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drm/i915: add panel reset workaround

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Ironlake requires that we clear the reset panel bit during power
sequences and restore it afterwards.  Uncondtionally add code to do that
since it should be harmless on SNB+.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Jesse Barnes 2010-08-11 10:04:43 -07:00
parent ce17178094
commit 37c6c9b0e9
1 changed files with 16 additions and 1 deletions
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17
drivers/gpu/drm/i915/intel_dp.c
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@ -765,6 +765,12 @@ static void ironlake_edp_panel_on (struct drm_device *dev)
return;
pp = I915_READ(PCH_PP_CONTROL);
/* ILK workaround: disable reset around power sequence */
pp &= ~PANEL_POWER_RESET;
I915_WRITE(PCH_PP_CONTROL, pp);
POSTING_READ(PCH_PP_CONTROL);
pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON;
I915_WRITE(PCH_PP_CONTROL, pp);
@ -773,7 +779,9 @@ static void ironlake_edp_panel_on (struct drm_device *dev)
I915_READ(PCH_PP_STATUS));
pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
pp |= PANEL_POWER_RESET; /* restore panel reset bit */
I915_WRITE(PCH_PP_CONTROL, pp);
POSTING_READ(PCH_PP_CONTROL);
}
static void ironlake_edp_panel_off (struct drm_device *dev)
@ -782,6 +790,12 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
u32 pp;
pp = I915_READ(PCH_PP_CONTROL);
/* ILK workaround: disable reset around power sequence */
pp &= ~PANEL_POWER_RESET;
I915_WRITE(PCH_PP_CONTROL, pp);
POSTING_READ(PCH_PP_CONTROL);
pp &= ~POWER_TARGET_ON;
I915_WRITE(PCH_PP_CONTROL, pp);
@ -790,8 +804,9 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
I915_READ(PCH_PP_STATUS));
/* Make sure VDD is enabled so DP AUX will work */
pp |= EDP_FORCE_VDD;
pp |= EDP_FORCE_VDD | PANEL_POWER_RESET; /* restore panel reset bit */
I915_WRITE(PCH_PP_CONTROL, pp);
POSTING_READ(PCH_PP_CONTROL);
}
static void ironlake_edp_backlight_on (struct drm_device *dev)