forked from luck/tmp_suning_uos_patched
kbuild: change if_changed_rule for multi-line recipe
The 'define' ... 'endef' directive is useful to confine a series of shell commands into a single macro: define foo [action1] [action2] [action3] endif Each action is executed in a separate subshell. However, rule_cc_o_c and rule_as_o_S in scripts/Makefile.build are written as follows (with a trailing semicolon in each cmd_*): define rule_cc_o_c [action1] ; \ [action2] ; \ [action3] ; endef All shell commands are concatenated with '; \' so that it looks like a single command from the Makefile point of view. This does not exploit the benefits of 'define' ... 'endef' form because a single shell command can be more simply written, like this: rule_cc_o_c = \ [action1] ; \ [action2] ; \ [action3] ; I guess the intention for the command concatenation was to let the '@set -e' in if_changed_rule cover all the commands. We can improve the readability by moving '@set -e' to the 'cmd' macro. The combo of $(call echo-cmd,*) $(cmd_*) in rule_cc_o_c and rule_as_o_S have been replaced with $(call cmd,*). The trailing back-slashes have been removed. Here is a note about the performance: the commands in rule_cc_o_c and rule_as_o_S were previously executed all together in a single subshell, but now each line in a separate subshell. This means Make will spawn extra subshells [1]. I measured the build performance for x86_64_defconfig + CONFIG_MODVERSIONS + CONFIG_TRIM_UNUSED_KSYMS and I saw slight performance regression, but I believe code readability and maintainability wins. [1] Precisely, GNU Make may optimize this by executing the command directly instead of forking a subshell, if no shell special characters are found in the command line and omitting the subshell will not change the behavior. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -215,7 +215,7 @@ echo-cmd = $(if $($(quiet)cmd_$(1)),\
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echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';)
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# printing commands
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cmd = @$(echo-cmd) $(cmd_$(1))
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cmd = @set -e; $(echo-cmd) $(cmd_$(1))
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# Add $(obj)/ for paths that are not absolute
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objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))
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@ -256,21 +256,17 @@ if_changed = $(if $(strip $(any-prereq) $(arg-check)), \
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printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd, @:)
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# Execute the command and also postprocess generated .d dependencies file.
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if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(cmd_and_fixdep), @:)
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if_changed_dep = $(if $(strip $(any-prereq) $(arg-check)),$(cmd_and_fixdep),@:)
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cmd_and_fixdep = \
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$(echo-cmd) $(cmd_$(1)); \
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$(cmd); \
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scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).cmd;\
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rm -f $(depfile);
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# Usage: $(call if_changed_rule,foo)
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# Will check if $(cmd_foo) or any of the prerequisites changed,
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# and if so will execute $(rule_foo).
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if_changed_rule = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(rule_$(1)), @:)
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if_changed_rule = $(if $(strip $(any-prereq) $(arg-check)),$(rule_$(1)),@:)
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###
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# why - tell why a target got built
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@ -260,20 +260,20 @@ cmd_gen_ksymdeps = \
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endif
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define rule_cc_o_c
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$(call echo-cmd,checksrc) $(cmd_checksrc) \
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$(call cmd_and_fixdep,cc_o_c) \
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$(cmd_gen_ksymdeps) \
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$(cmd_checkdoc) \
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$(call echo-cmd,objtool) $(cmd_objtool) \
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$(cmd_modversions_c) \
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$(call echo-cmd,record_mcount) $(cmd_record_mcount)
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$(call cmd,checksrc)
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$(call cmd_and_fixdep,cc_o_c)
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$(call cmd,gen_ksymdeps)
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$(call cmd,checkdoc)
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$(call cmd,objtool)
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$(call cmd,modversions_c)
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$(call cmd,record_mcount)
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endef
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define rule_as_o_S
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$(call cmd_and_fixdep,as_o_S) \
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$(cmd_gen_ksymdeps) \
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$(call echo-cmd,objtool) $(cmd_objtool) \
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$(cmd_modversions_S)
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$(call cmd_and_fixdep,as_o_S)
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$(call cmd,gen_ksymdeps)
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$(call cmd,objtool)
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$(call cmd,modversions_S)
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endef
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# List module undefined symbols (or empty line if not enabled)
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