forked from luck/tmp_suning_uos_patched
[PATCH] x86-64: Add EFER to the register set saved by save_processor_state
EFER varies like %cr4 depending on the cpu capabilities, and which cpu capabilities we want to make use of. So save/restore it make certain we have the same EFER value when we are done. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de>
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@ -33,7 +33,6 @@ void __save_processor_state(struct saved_context *ctxt)
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asm volatile ("str %0" : "=m" (ctxt->tr));
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/* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
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/* EFER should be constant for kernel version, no need to handle it. */
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/*
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* segment registers
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*/
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@ -50,6 +49,7 @@ void __save_processor_state(struct saved_context *ctxt)
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/*
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* control registers
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*/
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rdmsrl(MSR_EFER, ctxt->efer);
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asm volatile ("movq %%cr0, %0" : "=r" (ctxt->cr0));
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asm volatile ("movq %%cr2, %0" : "=r" (ctxt->cr2));
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asm volatile ("movq %%cr3, %0" : "=r" (ctxt->cr3));
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@ -75,6 +75,7 @@ void __restore_processor_state(struct saved_context *ctxt)
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/*
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* control registers
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*/
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wrmsrl(MSR_EFER, ctxt->efer);
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asm volatile ("movq %0, %%cr8" :: "r" (ctxt->cr8));
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asm volatile ("movq %0, %%cr4" :: "r" (ctxt->cr4));
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asm volatile ("movq %0, %%cr3" :: "r" (ctxt->cr3));
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@ -17,6 +17,7 @@ struct saved_context {
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u16 ds, es, fs, gs, ss;
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unsigned long gs_base, gs_kernel_base, fs_base;
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unsigned long cr0, cr2, cr3, cr4, cr8;
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unsigned long efer;
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u16 gdt_pad;
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u16 gdt_limit;
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unsigned long gdt_base;
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