forked from luck/tmp_suning_uos_patched
agp/intel: Fix resume regression from 2d2430cf
On i915 [EeePCs] something scribles over the registers during suspend and resume so we must save a copy of the PGETBL_CTL register programmed by the BIOS and restore that upon resume. Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -98,6 +98,7 @@ static struct _intel_private {
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u8 __iomem *registers;
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phys_addr_t gtt_bus_addr;
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phys_addr_t gma_bus_addr;
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phys_addr_t pte_bus_addr;
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u32 __iomem *gtt; /* I915G */
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int num_dcache_entries;
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union {
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@ -896,11 +897,9 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
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static void intel_enable_gtt(void)
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{
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u32 ptetbl_addr, gma_addr;
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u32 gma_addr;
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u16 gmch_ctrl;
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ptetbl_addr = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
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if (INTEL_GTT_GEN == 2)
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pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
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&gma_addr);
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@ -914,7 +913,8 @@ static void intel_enable_gtt(void)
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gmch_ctrl |= I830_GMCH_ENABLED;
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pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl);
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writel(ptetbl_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
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writel(intel_private.pte_bus_addr|I810_PGETBL_ENABLED,
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intel_private.registers+I810_PGETBL_CTL);
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readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
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}
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@ -930,6 +930,8 @@ static int i830_setup(void)
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return -ENOMEM;
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intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;
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intel_private.pte_bus_addr =
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readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
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intel_i830_setup_flush();
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@ -1279,6 +1281,7 @@ static int i9xx_setup(void)
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if (INTEL_GTT_GEN == 3) {
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u32 gtt_addr;
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pci_read_config_dword(intel_private.pcidev,
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I915_PTEADDR, >t_addr);
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intel_private.gtt_bus_addr = gtt_addr;
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@ -1298,6 +1301,9 @@ static int i9xx_setup(void)
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intel_private.gtt_bus_addr = reg_addr + gtt_offset;
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}
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intel_private.pte_bus_addr =
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readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
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intel_i9xx_setup_flush();
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return 0;
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