forked from luck/tmp_suning_uos_patched
x86: convert TSC disabling to generic cpuid disable bitmap
Fix from: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -154,7 +154,7 @@ static void __init check_config(void)
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* If we configured ourselves for a TSC, we'd better have one!
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*/
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#ifdef CONFIG_X86_TSC
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if (!cpu_has_tsc && !tsc_disable)
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if (!cpu_has_tsc)
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panic("Kernel compiled for Pentium+, requires TSC feature!");
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#endif
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@ -446,10 +446,6 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
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* we do "generic changes."
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*/
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/* TSC disabled? */
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if ( tsc_disable )
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clear_bit(X86_FEATURE_TSC, c->x86_capability);
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/* If the model name is still unset, do table lookup. */
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if ( !c->x86_model_id[0] ) {
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char *p;
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@ -650,11 +646,6 @@ void __cpuinit cpu_init(void)
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if (cpu_has_vme || cpu_has_tsc || cpu_has_de)
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clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
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if (tsc_disable && cpu_has_tsc) {
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printk(KERN_NOTICE "Disabling TSC...\n");
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/**** FIX-HPA: DOES THIS REALLY BELONG HERE? ****/
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clear_bit(X86_FEATURE_TSC, boot_cpu_data.x86_capability);
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}
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load_idt(&idt_descr);
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switch_to_new_gdt();
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@ -82,7 +82,7 @@ static int __init numaq_tsc_disable(void)
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{
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if (num_online_nodes() > 1) {
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printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
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tsc_disable = 1;
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setup_clear_cpu_cap(X86_FEATURE_TSC);
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}
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return 0;
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}
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@ -24,8 +24,6 @@ static int tsc_enabled;
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unsigned int tsc_khz;
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EXPORT_SYMBOL_GPL(tsc_khz);
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int tsc_disable;
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#ifdef CONFIG_X86_TSC
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static int __init tsc_setup(char *str)
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{
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@ -40,8 +38,7 @@ static int __init tsc_setup(char *str)
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*/
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static int __init tsc_setup(char *str)
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{
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tsc_disable = 1;
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setup_clear_cpu_cap(X86_FEATURE_TSC);
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return 1;
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}
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#endif
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@ -395,7 +392,7 @@ void __init tsc_init(void)
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{
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int cpu;
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if (!cpu_has_tsc || tsc_disable)
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if (!cpu_has_tsc)
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goto out_no_tsc;
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cpu_khz = calculate_cpu_khz();
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@ -439,10 +436,5 @@ void __init tsc_init(void)
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return;
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out_no_tsc:
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/*
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* Set the tsc_disable flag if there's no TSC support, this
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* makes it a fast flag for the kernel to see whether it
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* should be using the TSC.
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*/
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tsc_disable = 1;
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setup_clear_cpu_cap(X86_FEATURE_TSC);
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}
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@ -37,7 +37,7 @@ void __init pre_setup_arch_hook(void)
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{
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/* Voyagers run their CPUs from independent clocks, so disable
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* the TSC code because we can't sync them */
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tsc_disable = 1;
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setup_clear_cpu_cap(X86_FEATURE_TSC);
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}
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void __init trap_init_hook(void)
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@ -592,7 +592,7 @@ __init void xen_time_init(void)
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set_normalized_timespec(&wall_to_monotonic,
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-xtime.tv_sec, -xtime.tv_nsec);
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tsc_disable = 0;
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setup_force_cpu_cap(X86_FEATURE_TSC);
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xen_setup_timer(cpu);
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xen_setup_cpu_clockevents();
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@ -135,6 +135,10 @@
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clear_cpu_cap(&boot_cpu_data, bit); \
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set_bit(bit, cleared_cpu_caps); \
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} while (0)
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#define setup_force_cpu_cap(bit) do { \
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set_cpu_cap(&boot_cpu_data, bit); \
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clear_bit(bit, cleared_cpu_caps); \
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} while (0)
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#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
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#define cpu_has_vme boot_cpu_has(X86_FEATURE_VME)
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@ -16,8 +16,6 @@ typedef unsigned long long cycles_t;
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extern unsigned int cpu_khz;
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extern unsigned int tsc_khz;
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/* flag for disabling the tsc */
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extern int tsc_disable;
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extern void disable_TSC(void);
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