forked from luck/tmp_suning_uos_patched
Merge tag 'drm-intel-fixes-2013-12-18' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
Besides the 2 fixes for tricky corner cases in gem from Chris I've promised already two patche from Paulo to fix pc8 warnings (both ported from -next, bug report from Dave Jones) and one patch from to fix vga enable/disable on snb+. That one is a really old bug, but apparently it can cause machine hangs if you try hard enough with vgacon/efifb handover. * tag 'drm-intel-fixes-2013-12-18' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915: Use the correct GMCH_CTRL register for Sandybridge+ drm/i915: get a PC8 reference when enabling the power well drm/i915: change CRTC assertion on LCPLL disable drm/i915: Fix erroneous dereference of batch_obj inside reset_status drm/i915: Prevent double unref following alloc failure during execbuffer
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commit
418cb50bd6
@ -2343,15 +2343,24 @@ static void i915_gem_free_request(struct drm_i915_gem_request *request)
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kfree(request);
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}
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static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
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struct intel_ring_buffer *ring)
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static void i915_gem_reset_ring_status(struct drm_i915_private *dev_priv,
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struct intel_ring_buffer *ring)
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{
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u32 completed_seqno;
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u32 acthd;
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u32 completed_seqno = ring->get_seqno(ring, false);
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u32 acthd = intel_ring_get_active_head(ring);
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struct drm_i915_gem_request *request;
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acthd = intel_ring_get_active_head(ring);
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completed_seqno = ring->get_seqno(ring, false);
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list_for_each_entry(request, &ring->request_list, list) {
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if (i915_seqno_passed(completed_seqno, request->seqno))
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continue;
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i915_set_reset_status(ring, request, acthd);
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}
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}
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static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
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struct intel_ring_buffer *ring)
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{
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while (!list_empty(&ring->request_list)) {
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struct drm_i915_gem_request *request;
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@ -2359,9 +2368,6 @@ static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
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struct drm_i915_gem_request,
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list);
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if (request->seqno > completed_seqno)
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i915_set_reset_status(ring, request, acthd);
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i915_gem_free_request(request);
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}
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@ -2403,8 +2409,16 @@ void i915_gem_reset(struct drm_device *dev)
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struct intel_ring_buffer *ring;
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int i;
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/*
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* Before we free the objects from the requests, we need to inspect
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* them for finding the guilty party. As the requests only borrow
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* their reference to the objects, the inspection must be done first.
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*/
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for_each_ring(ring, dev_priv, i)
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i915_gem_reset_ring_lists(dev_priv, ring);
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i915_gem_reset_ring_status(dev_priv, ring);
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for_each_ring(ring, dev_priv, i)
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i915_gem_reset_ring_cleanup(dev_priv, ring);
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i915_gem_cleanup_ringbuffer(dev);
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@ -93,7 +93,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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{
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struct drm_i915_gem_object *obj;
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struct list_head objects;
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int i, ret = 0;
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int i, ret;
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INIT_LIST_HEAD(&objects);
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spin_lock(&file->table_lock);
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@ -106,7 +106,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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DRM_DEBUG("Invalid object handle %d at index %d\n",
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exec[i].handle, i);
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ret = -ENOENT;
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goto out;
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goto err;
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}
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if (!list_empty(&obj->obj_exec_link)) {
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@ -114,7 +114,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
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obj, exec[i].handle, i);
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ret = -EINVAL;
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goto out;
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goto err;
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}
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drm_gem_object_reference(&obj->base);
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@ -123,9 +123,13 @@ eb_lookup_vmas(struct eb_vmas *eb,
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spin_unlock(&file->table_lock);
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i = 0;
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list_for_each_entry(obj, &objects, obj_exec_link) {
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while (!list_empty(&objects)) {
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struct i915_vma *vma;
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obj = list_first_entry(&objects,
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struct drm_i915_gem_object,
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obj_exec_link);
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/*
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* NOTE: We can leak any vmas created here when something fails
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* later on. But that's no issue since vma_unbind can deal with
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@ -138,10 +142,12 @@ eb_lookup_vmas(struct eb_vmas *eb,
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if (IS_ERR(vma)) {
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DRM_DEBUG("Failed to lookup VMA\n");
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ret = PTR_ERR(vma);
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goto out;
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goto err;
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}
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/* Transfer ownership from the objects list to the vmas list. */
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list_add_tail(&vma->exec_list, &eb->vmas);
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list_del_init(&obj->obj_exec_link);
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vma->exec_entry = &exec[i];
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if (eb->and < 0) {
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@ -155,16 +161,22 @@ eb_lookup_vmas(struct eb_vmas *eb,
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++i;
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}
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return 0;
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out:
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err:
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while (!list_empty(&objects)) {
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obj = list_first_entry(&objects,
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struct drm_i915_gem_object,
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obj_exec_link);
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list_del_init(&obj->obj_exec_link);
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if (ret)
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drm_gem_object_unreference(&obj->base);
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drm_gem_object_unreference(&obj->base);
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}
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/*
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* Objects already transfered to the vmas list will be unreferenced by
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* eb_destroy.
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*/
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return ret;
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}
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@ -6303,7 +6303,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
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uint32_t val;
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
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WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n",
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WARN(crtc->active, "CRTC for pipe %c enabled\n",
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pipe_name(crtc->pipe));
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WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n");
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@ -11126,14 +11126,15 @@ void intel_connector_attach_encoder(struct intel_connector *connector,
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int intel_modeset_vga_set_state(struct drm_device *dev, bool state)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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unsigned reg = INTEL_INFO(dev)->gen >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
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u16 gmch_ctrl;
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pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl);
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pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl);
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if (state)
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gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
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else
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gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
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pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl);
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pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl);
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return 0;
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}
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@ -5688,6 +5688,8 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
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unsigned long irqflags;
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uint32_t tmp;
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WARN_ON(dev_priv->pc8.enabled);
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tmp = I915_READ(HSW_PWR_WELL_DRIVER);
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is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED;
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enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST;
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@ -5747,16 +5749,24 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
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static void __intel_power_well_get(struct drm_device *dev,
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struct i915_power_well *power_well)
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{
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if (!power_well->count++)
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (!power_well->count++) {
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hsw_disable_package_c8(dev_priv);
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__intel_set_power_well(dev, true);
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}
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}
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static void __intel_power_well_put(struct drm_device *dev,
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struct i915_power_well *power_well)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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WARN_ON(!power_well->count);
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if (!--power_well->count && i915_disable_power_well)
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if (!--power_well->count && i915_disable_power_well) {
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__intel_set_power_well(dev, false);
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hsw_enable_package_c8(dev_priv);
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}
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}
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void intel_display_power_get(struct drm_device *dev,
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