forked from luck/tmp_suning_uos_patched
ARM: 5774/1: Fix Realview ARM1176PB board reboot
This is the fix for proper reboot of Realview ARM1176PB board when issuing the reboot command. Setting the eighth bit of control register SYS_RESETCTL to 1 to force a soft reset. arch_reset() is modified for realview machines to call machine specific reset function pointers. Signed-off-by: Philby John <pjohn@in.mvista.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -61,5 +61,5 @@ extern void realview_timer_init(unsigned int timer_irq);
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extern int realview_flash_register(struct resource *res, u32 num);
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extern int realview_eth_register(const char *name, struct resource *res);
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extern int realview_usb_register(struct resource *res);
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extern void (*realview_reset)(char);
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#endif
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@ -73,4 +73,9 @@
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#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
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#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
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/*
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* Control register SYS_RESETCTL is set to 1 to force a soft reset
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*/
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#define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL 0x0100
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#endif /* __ASM_ARCH_BOARD_PB1176_H */
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@ -81,4 +81,16 @@
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#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
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#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
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/*
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* Values for REALVIEW_SYS_RESET_CTRL
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*/
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#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR 0x01
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#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT 0x02
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#define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET 0x03
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#define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET 0x04
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#define REALVIEW_PB11MP_SYS_CTRL_RESET_POR 0x05
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#define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC 0x06
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#define REALVIEW_PB11MP_SYS_CTRL_LED (1 << 0)
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#endif /* __ASM_ARCH_BOARD_PB11MP_H */
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@ -119,19 +119,6 @@
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#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
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#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
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/*
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* Values for REALVIEW_SYS_RESET_CTRL
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*/
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#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
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#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
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#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
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#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
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#define REALVIEW_SYS_CTRL_RESET_POR 0x05
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#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
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#define REALVIEW_SYS_CTRL_LED (1 << 0)
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/* ------------------------------------------------------------------------
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* RealView control registers
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* ------------------------------------------------------------------------
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@ -153,7 +140,7 @@
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* SYS_CLD, SYS_BOOTCS
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*/
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#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
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#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
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#define REALVIEW_SYS_LOCKVAL_MASK 0xA05F /* Enable write access */
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/*
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* REALVIEW_SYS_FLASH
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@ -25,6 +25,8 @@
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#include <mach/hardware.h>
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#include <mach/platform.h>
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void (*realview_reset)(char mode);
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static inline void arch_idle(void)
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{
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/*
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@ -36,16 +38,12 @@ static inline void arch_idle(void)
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static inline void arch_reset(char mode, const char *cmd)
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{
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void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
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unsigned int val;
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/*
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* To reset, we hit the on-board reset register
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* in the system FPGA
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*/
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val = __raw_readl(hdr_ctrl);
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val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
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__raw_writel(val, hdr_ctrl);
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if (realview_reset)
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realview_reset(mode);
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}
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#endif
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@ -290,6 +290,16 @@ static struct sys_timer realview_pb1176_timer = {
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.init = realview_pb1176_timer_init,
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};
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static void realview_pb1176_reset(char mode)
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{
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void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
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REALVIEW_SYS_RESETCTL_OFFSET;
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void __iomem *rst_hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
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REALVIEW_SYS_LOCK_OFFSET;
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__raw_writel(REALVIEW_SYS_LOCKVAL_MASK, rst_hdr_ctrl);
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__raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl);
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}
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static void __init realview_pb1176_init(void)
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{
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int i;
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@ -313,6 +323,7 @@ static void __init realview_pb1176_init(void)
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#ifdef CONFIG_LEDS
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leds_event = realview_leds_event;
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#endif
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realview_reset = realview_pb1176_reset;
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}
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MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
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@ -299,6 +299,21 @@ static struct sys_timer realview_pb11mp_timer = {
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.init = realview_pb11mp_timer_init,
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};
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static void realview_pb11mp_reset(char mode)
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{
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void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
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REALVIEW_SYS_RESETCTL_OFFSET;
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unsigned int val;
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/*
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* To reset, we hit the on-board reset register
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* in the system FPGA
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*/
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val = __raw_readl(hdr_ctrl);
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val |= REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR;
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__raw_writel(val, hdr_ctrl);
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}
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static void __init realview_pb11mp_init(void)
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{
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int i;
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@ -324,6 +339,7 @@ static void __init realview_pb11mp_init(void)
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#ifdef CONFIG_LEDS
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leds_event = realview_leds_event;
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#endif
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realview_reset = realview_pb11mp_reset;
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}
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MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
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