forked from luck/tmp_suning_uos_patched
parisc: Switch to generic sched_clock implementation
Drop the open-coded sched_clock() function and replace it by the provided GENERIC_SCHED_CLOCK implementation. We have seen quite some hung tasks in the past, which seem to be fixed by this patch. Signed-off-by: Helge Deller <deller@gmx.de> Cc: <stable@vger.kernel.org> # v4.7+ Signed-off-by: Helge Deller <deller@gmx.de>
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@ -34,7 +34,9 @@ config PARISC
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select HAVE_ARCH_HASH
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select HAVE_ARCH_SECCOMP_FILTER
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select HAVE_ARCH_TRACEHOOK
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select HAVE_UNSTABLE_SCHED_CLOCK if (SMP || !64BIT)
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select GENERIC_SCHED_CLOCK
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select HAVE_UNSTABLE_SCHED_CLOCK if SMP
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select GENERIC_CLOCKEVENTS
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select ARCH_NO_COHERENT_DMA_MMAP
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select CPU_NO_EFFICIENT_FFS
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@ -14,6 +14,7 @@
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#include <linux/module.h>
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#include <linux/rtc.h>
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#include <linux/sched.h>
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#include <linux/sched_clock.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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@ -39,18 +40,6 @@
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static unsigned long clocktick __read_mostly; /* timer cycles per tick */
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#ifndef CONFIG_64BIT
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/*
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* The processor-internal cycle counter (Control Register 16) is used as time
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* source for the sched_clock() function. This register is 64bit wide on a
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* 64-bit kernel and 32bit on a 32-bit kernel. Since sched_clock() always
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* requires a 64bit counter we emulate on the 32-bit kernel the higher 32bits
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* with a per-cpu variable which we increase every time the counter
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* wraps-around (which happens every ~4 secounds).
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*/
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static DEFINE_PER_CPU(unsigned long, cr16_high_32_bits);
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#endif
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/*
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* We keep time on PA-RISC Linux by using the Interval Timer which is
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* a pair of registers; one is read-only and one is write-only; both
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@ -121,12 +110,6 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
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*/
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mtctl(next_tick, 16);
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#if !defined(CONFIG_64BIT)
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/* check for overflow on a 32bit kernel (every ~4 seconds). */
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if (unlikely(next_tick < now))
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this_cpu_inc(cr16_high_32_bits);
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#endif
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/* Skip one clocktick on purpose if we missed next_tick.
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* The new CR16 must be "later" than current CR16 otherwise
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* itimer would not fire until CR16 wrapped - e.g 4 seconds
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@ -208,7 +191,7 @@ EXPORT_SYMBOL(profile_pc);
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/* clock source code */
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static cycle_t read_cr16(struct clocksource *cs)
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static cycle_t notrace read_cr16(struct clocksource *cs)
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{
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return get_cycles();
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}
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@ -287,26 +270,9 @@ void read_persistent_clock(struct timespec *ts)
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}
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/*
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* sched_clock() framework
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*/
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static u32 cyc2ns_mul __read_mostly;
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static u32 cyc2ns_shift __read_mostly;
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u64 sched_clock(void)
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static u64 notrace read_cr16_sched_clock(void)
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{
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u64 now;
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/* Get current cycle counter (Control Register 16). */
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#ifdef CONFIG_64BIT
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now = mfctl(16);
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#else
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now = mfctl(16) + (((u64) this_cpu_read(cr16_high_32_bits)) << 32);
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#endif
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/* return the value in ns (cycles_2_ns) */
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return mul_u64_u32_shr(now, cyc2ns_mul, cyc2ns_shift);
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return get_cycles();
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}
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@ -316,17 +282,16 @@ u64 sched_clock(void)
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void __init time_init(void)
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{
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unsigned long current_cr16_khz;
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unsigned long cr16_hz;
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current_cr16_khz = PAGE0->mem_10msec/10; /* kHz */
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clocktick = (100 * PAGE0->mem_10msec) / HZ;
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/* calculate mult/shift values for cr16 */
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clocks_calc_mult_shift(&cyc2ns_mul, &cyc2ns_shift, current_cr16_khz,
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NSEC_PER_MSEC, 0);
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start_cpu_itimer(); /* get CPU 0 started */
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cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */
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/* register at clocksource framework */
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clocksource_register_khz(&clocksource_cr16, current_cr16_khz);
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clocksource_register_hz(&clocksource_cr16, cr16_hz);
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/* register as sched_clock source */
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sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
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}
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