forked from luck/tmp_suning_uos_patched
NVMe: Only clear the enable bit when disabling controller
Many of the bits in the Controller Configuration register may only be modified when the Enable bit is clear. Clearing them at the same time as the Enable bit might be OK, but let's play it safe and only touch the Enable bit. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com> Reviewed-by: Keith Busch <keith.busch@intel.com>
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@ -1137,7 +1137,10 @@ static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
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*/
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static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
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{
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writel(0, &dev->bar->cc);
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u32 cc = readl(&dev->bar->cc);
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if (cc & NVME_CC_ENABLE)
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writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
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return nvme_wait_ready(dev, cap, false);
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}
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