forked from luck/tmp_suning_uos_patched
[SCSI] ipr: Use PCI-E reset API for new ipr adapter
Use a newly added PCI API to issue a PCI Fundamental reset (warm reset) to a new ipr PCI-E adapter. Typically, the ipr adapter uses the start BIST bit in config space to reset an adapter. Issuing start BIST on this particular adapter results in the PCI-E logic on the card losing sync, which causes PCI-E errors, making the card unusable. The only reset mechanism that exists on this hardware that does not have this problem is PCI Fundamental reset (warm reset). Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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d24f8e8fef
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463fc696ed
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@ -6640,6 +6640,48 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
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return rc;
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}
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/**
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* ipr_reset_slot_reset_done - Clear PCI reset to the adapter
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* @ipr_cmd: ipr command struct
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*
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* Description: This clears PCI reset to the adapter and delays two seconds.
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*
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* Return value:
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* IPR_RC_JOB_RETURN
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**/
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static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
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{
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ENTER;
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pci_set_pcie_reset_state(ipr_cmd->ioa_cfg->pdev, pcie_deassert_reset);
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ipr_cmd->job_step = ipr_reset_bist_done;
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ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
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LEAVE;
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return IPR_RC_JOB_RETURN;
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}
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/**
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* ipr_reset_slot_reset - Reset the PCI slot of the adapter.
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* @ipr_cmd: ipr command struct
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*
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* Description: This asserts PCI reset to the adapter.
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*
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* Return value:
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* IPR_RC_JOB_RETURN
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**/
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static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
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{
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struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
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struct pci_dev *pdev = ioa_cfg->pdev;
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ENTER;
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pci_block_user_cfg_access(pdev);
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pci_set_pcie_reset_state(pdev, pcie_warm_reset);
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ipr_cmd->job_step = ipr_reset_slot_reset_done;
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ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
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LEAVE;
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return IPR_RC_JOB_RETURN;
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}
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/**
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* ipr_reset_allowed - Query whether or not IOA can be reset
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* @ioa_cfg: ioa config struct
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@ -6679,7 +6721,7 @@ static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
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ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
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ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
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} else {
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ipr_cmd->job_step = ipr_reset_start_bist;
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ipr_cmd->job_step = ioa_cfg->reset;
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rc = IPR_RC_JOB_CONTINUE;
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}
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@ -6712,7 +6754,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
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writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg);
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ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
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} else {
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ipr_cmd->job_step = ipr_reset_start_bist;
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ipr_cmd->job_step = ioa_cfg->reset;
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}
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ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
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@ -6994,8 +7036,11 @@ static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
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struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
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spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
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_ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
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IPR_SHUTDOWN_NONE);
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if (ioa_cfg->needs_warm_reset)
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ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
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else
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_ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
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IPR_SHUTDOWN_NONE);
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spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
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return PCI_ERS_RESULT_RECOVERED;
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}
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@ -7483,6 +7528,14 @@ static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
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else
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ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
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rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &ioa_cfg->revid);
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if (rc != PCIBIOS_SUCCESSFUL) {
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dev_err(&pdev->dev, "Failed to read PCI revision ID\n");
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rc = -EIO;
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goto out_scsi_host_put;
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}
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ipr_regs_pci = pci_resource_start(pdev, 0);
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rc = pci_request_regions(pdev, IPR_NAME);
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@ -7569,6 +7622,13 @@ static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
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goto cleanup_nolog;
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}
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if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
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(dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
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ioa_cfg->needs_warm_reset = 1;
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ioa_cfg->reset = ipr_reset_slot_reset;
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} else
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ioa_cfg->reset = ipr_reset_start_bist;
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spin_lock(&ipr_driver_lock);
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list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
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spin_unlock(&ipr_driver_lock);
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@ -7835,7 +7895,7 @@ static struct pci_device_id ipr_pci_table[] __devinitdata = {
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PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
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{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
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PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
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IPR_USE_LONG_TRANSOP_TIMEOUT },
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IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
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{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
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PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
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{ PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
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@ -37,7 +37,7 @@
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/*
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* Literals
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*/
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#define IPR_DRIVER_VERSION "2.4.0"
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#define IPR_DRIVER_VERSION "2.4.1"
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#define IPR_DRIVER_DATE "(April 24, 2007)"
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/*
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@ -112,6 +112,7 @@
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/* Driver data flags */
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#define IPR_USE_LONG_TRANSOP_TIMEOUT 0x00000001
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#define IPR_USE_PCI_WARM_RESET 0x00000002
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#define IPR_DEFAULT_MAX_ERROR_DUMP 984
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#define IPR_NUM_LOG_HCAMS 2
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@ -193,6 +194,7 @@
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#define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
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#define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
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#define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
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#define IPR_PCI_RESET_TIMEOUT (HZ / 2)
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#define IPR_DUMP_TIMEOUT (15 * HZ)
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/*
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@ -1091,6 +1093,9 @@ struct ipr_ioa_cfg {
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u8 allow_ml_add_del:1;
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u8 needs_hard_reset:1;
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u8 dual_raid:1;
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u8 needs_warm_reset:1;
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u8 revid;
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enum ipr_cache_state cache_state;
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u16 type; /* CCIN of the card */
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@ -1184,6 +1189,7 @@ struct ipr_ioa_cfg {
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struct pci_pool *ipr_cmd_pool;
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struct ipr_cmnd *reset_cmd;
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int (*reset) (struct ipr_cmnd *);
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struct ata_host ata_host;
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char ipr_cmd_label[8];
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