forked from luck/tmp_suning_uos_patched
ath9k: use common read/write ops on pci and debug code
PCI and debug code will not be shared between ath9k and ath9k_htc, so make that code use the common read/write ops. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -18,6 +18,11 @@
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#include "ath9k.h"
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#define REG_WRITE_D(_ah, _reg, _val) \
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ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg))
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#define REG_READ_D(_ah, _reg) \
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ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
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static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
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module_param_named(debug, ath9k_debug, uint, 0);
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@ -82,7 +87,7 @@ static ssize_t read_file_dma(struct file *file, char __user *user_buf,
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ath9k_ps_wakeup(sc);
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REG_WRITE(ah, AR_MACMISC,
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REG_WRITE_D(ah, AR_MACMISC,
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((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
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(AR_MACMISC_MISC_OBS_BUS_1 <<
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AR_MACMISC_MISC_OBS_BUS_MSB_S)));
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@ -94,7 +99,7 @@ static ssize_t read_file_dma(struct file *file, char __user *user_buf,
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if (i % 4 == 0)
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len += snprintf(buf + len, sizeof(buf) - len, "\n");
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val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32)));
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val[i] = REG_READ_D(ah, AR_DMADBG_0 + (i * sizeof(u32)));
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len += snprintf(buf + len, sizeof(buf) - len, "%d: %08x ",
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i, val[i]);
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}
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@ -144,9 +149,9 @@ static ssize_t read_file_dma(struct file *file, char __user *user_buf,
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(val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
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len += snprintf(buf + len, sizeof(buf) - len, "pcu observe: 0x%x \n",
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REG_READ(ah, AR_OBS_BUS_1));
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REG_READ_D(ah, AR_OBS_BUS_1));
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len += snprintf(buf + len, sizeof(buf) - len,
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"AR_CR: 0x%x \n", REG_READ(ah, AR_CR));
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"AR_CR: 0x%x \n", REG_READ_D(ah, AR_CR));
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ath9k_ps_restore(sc);
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@ -363,12 +368,12 @@ static ssize_t read_file_wiphy(struct file *file, char __user *user_buf,
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aphy->chan_idx, aphy->chan_is_ht);
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}
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put_unaligned_le32(REG_READ(sc->sc_ah, AR_STA_ID0), addr);
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put_unaligned_le16(REG_READ(sc->sc_ah, AR_STA_ID1) & 0xffff, addr + 4);
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put_unaligned_le32(REG_READ_D(sc->sc_ah, AR_STA_ID0), addr);
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put_unaligned_le16(REG_READ_D(sc->sc_ah, AR_STA_ID1) & 0xffff, addr + 4);
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len += snprintf(buf + len, sizeof(buf) - len,
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"addr: %pM\n", addr);
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put_unaligned_le32(REG_READ(sc->sc_ah, AR_BSSMSKL), addr);
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put_unaligned_le16(REG_READ(sc->sc_ah, AR_BSSMSKU) & 0xffff, addr + 4);
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put_unaligned_le32(REG_READ_D(sc->sc_ah, AR_BSSMSKL), addr);
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put_unaligned_le16(REG_READ_D(sc->sc_ah, AR_BSSMSKU) & 0xffff, addr + 4);
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len += snprintf(buf + len, sizeof(buf) - len,
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"addrmask: %pM\n", addr);
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@ -65,7 +65,7 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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{
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struct ath_hw *ah = (struct ath_hw *) common->ah;
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(void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
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common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
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if (!ath9k_hw_wait(ah,
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AR_EEPROM_STATUS_DATA,
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@ -75,7 +75,7 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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return false;
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}
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*data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
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*data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
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AR_EEPROM_STATUS_DATA_VAL);
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return true;
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