forked from luck/tmp_suning_uos_patched
Miscellaneous bugfixes, plus a small patchlet related to Spectre v2.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJbTwvXAAoJEL/70l94x66D068H/0lNKsk33AHZGsVOr3qZJNpE 6NI746ZXurRNNZ6d64hVIBDfTI4P3lurjQmb9/GUSwvoHW0S2zMug0F59TKYQ3EO kcX+b9LRmBkUq2h2R8XXTVkmaZ1SqwvXVVzx80T2cXAD3J3kuX6Yj+z1RO7MrXWI ZChA3ZT/eqsGEzle+yu/YExAgbv+7xzuBNBaas7QvJE8CHZzPKYjVBEY6DAWx53L LMq8C3NsHpJhXD6Rcq9DIyrktbDSi+xRBbYsJrhSEe0MfzmgBkkysl86uImQWZxk /2uHUVz+85IYy3C+ZbagmlSmHm1Civb6VyVNu9K3nRxooVtmmgudsA9VYJRRVx4= =M0K/ -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm fixes from Paolo Bonzini: "Miscellaneous bugfixes, plus a small patchlet related to Spectre v2" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: kvmclock: fix TSC calibration for nested guests KVM: VMX: Mark VMXArea with revision_id of physical CPU even when eVMCS enabled KVM: irqfd: fix race between EPOLLHUP and irq_bypass_register_consumer KVM/Eventfd: Avoid crash when assign and deassign specific eventfd in parallel. x86/kvmclock: set pvti_cpu0_va after enabling kvmclock x86/kvm/Kconfig: Ensure CRYPTO_DEV_CCP_DD state at minimum matches KVM_AMD kvm: nVMX: Restore exit qual for VM-entry failure due to MSR loading x86/kvm/vmx: don't read current->thread.{fs,gs}base of legacy tasks KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
This commit is contained in:
commit
47f7dc4b84
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@ -138,6 +138,7 @@ static unsigned long kvm_get_tsc_khz(void)
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src = &hv_clock[cpu].pvti;
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tsc_khz = pvclock_tsc_khz(src);
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put_cpu();
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setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
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return tsc_khz;
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}
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@ -319,6 +320,8 @@ void __init kvmclock_init(void)
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printk(KERN_INFO "kvm-clock: Using msrs %x and %x",
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msr_kvm_system_time, msr_kvm_wall_clock);
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pvclock_set_pvti_cpu0_va(hv_clock);
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if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT))
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pvclock_set_flags(PVCLOCK_TSC_STABLE_BIT);
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@ -366,14 +369,11 @@ int __init kvm_setup_vsyscall_timeinfo(void)
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vcpu_time = &hv_clock[cpu].pvti;
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flags = pvclock_read_flags(vcpu_time);
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if (!(flags & PVCLOCK_TSC_STABLE_BIT)) {
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put_cpu();
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return 1;
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}
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pvclock_set_pvti_cpu0_va(hv_clock);
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put_cpu();
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if (!(flags & PVCLOCK_TSC_STABLE_BIT))
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return 1;
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kvm_clock.archdata.vclock_mode = VCLOCK_PVCLOCK;
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#endif
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return 0;
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@ -85,7 +85,7 @@ config KVM_AMD_SEV
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def_bool y
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bool "AMD Secure Encrypted Virtualization (SEV) support"
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depends on KVM_AMD && X86_64
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depends on CRYPTO_DEV_CCP && CRYPTO_DEV_CCP_DD && CRYPTO_DEV_SP_PSP
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depends on CRYPTO_DEV_SP_PSP && !(KVM_AMD=y && CRYPTO_DEV_CCP_DD=m)
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---help---
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Provides support for launching Encrypted VMs on AMD processors.
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@ -2571,6 +2571,7 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu)
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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#ifdef CONFIG_X86_64
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int cpu = raw_smp_processor_id();
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unsigned long fs_base, kernel_gs_base;
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#endif
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int i;
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@ -2586,12 +2587,20 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu)
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vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
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#ifdef CONFIG_X86_64
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save_fsgs_for_kvm();
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vmx->host_state.fs_sel = current->thread.fsindex;
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vmx->host_state.gs_sel = current->thread.gsindex;
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#else
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savesegment(fs, vmx->host_state.fs_sel);
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savesegment(gs, vmx->host_state.gs_sel);
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if (likely(is_64bit_mm(current->mm))) {
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save_fsgs_for_kvm();
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vmx->host_state.fs_sel = current->thread.fsindex;
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vmx->host_state.gs_sel = current->thread.gsindex;
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fs_base = current->thread.fsbase;
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kernel_gs_base = current->thread.gsbase;
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} else {
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#endif
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savesegment(fs, vmx->host_state.fs_sel);
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savesegment(gs, vmx->host_state.gs_sel);
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#ifdef CONFIG_X86_64
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fs_base = read_msr(MSR_FS_BASE);
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kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE);
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}
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#endif
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if (!(vmx->host_state.fs_sel & 7)) {
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vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
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@ -2611,10 +2620,10 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu)
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savesegment(ds, vmx->host_state.ds_sel);
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savesegment(es, vmx->host_state.es_sel);
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vmcs_writel(HOST_FS_BASE, current->thread.fsbase);
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vmcs_writel(HOST_FS_BASE, fs_base);
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vmcs_writel(HOST_GS_BASE, cpu_kernelmode_gs_base(cpu));
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vmx->msr_host_kernel_gs_base = current->thread.gsbase;
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vmx->msr_host_kernel_gs_base = kernel_gs_base;
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if (is_long_mode(&vmx->vcpu))
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wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
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#else
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@ -4322,11 +4331,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
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vmcs_conf->order = get_order(vmcs_conf->size);
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vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
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/* KVM supports Enlightened VMCS v1 only */
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if (static_branch_unlikely(&enable_evmcs))
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vmcs_conf->revision_id = KVM_EVMCS_VERSION;
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else
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vmcs_conf->revision_id = vmx_msr_low;
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vmcs_conf->revision_id = vmx_msr_low;
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vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
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vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
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@ -4396,7 +4401,13 @@ static struct vmcs *alloc_vmcs_cpu(int cpu)
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return NULL;
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vmcs = page_address(pages);
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memset(vmcs, 0, vmcs_config.size);
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vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
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/* KVM supports Enlightened VMCS v1 only */
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if (static_branch_unlikely(&enable_evmcs))
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vmcs->revision_id = KVM_EVMCS_VERSION;
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else
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vmcs->revision_id = vmcs_config.revision_id;
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return vmcs;
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}
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@ -4564,6 +4575,19 @@ static __init int alloc_kvm_area(void)
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return -ENOMEM;
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}
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/*
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* When eVMCS is enabled, alloc_vmcs_cpu() sets
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* vmcs->revision_id to KVM_EVMCS_VERSION instead of
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* revision_id reported by MSR_IA32_VMX_BASIC.
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*
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* However, even though not explictly documented by
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* TLFS, VMXArea passed as VMXON argument should
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* still be marked with revision_id reported by
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* physical CPU.
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*/
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if (static_branch_unlikely(&enable_evmcs))
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vmcs->revision_id = vmcs_config.revision_id;
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per_cpu(vmxarea, cpu) = vmcs;
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}
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return 0;
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@ -11753,7 +11777,6 @@ static int enter_vmx_non_root_mode(struct kvm_vcpu *vcpu)
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{
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
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u32 msr_entry_idx;
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u32 exit_qual;
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int r;
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@ -11775,10 +11798,10 @@ static int enter_vmx_non_root_mode(struct kvm_vcpu *vcpu)
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nested_get_vmcs12_pages(vcpu, vmcs12);
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r = EXIT_REASON_MSR_LOAD_FAIL;
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msr_entry_idx = nested_vmx_load_msr(vcpu,
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vmcs12->vm_entry_msr_load_addr,
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vmcs12->vm_entry_msr_load_count);
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if (msr_entry_idx)
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exit_qual = nested_vmx_load_msr(vcpu,
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vmcs12->vm_entry_msr_load_addr,
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vmcs12->vm_entry_msr_load_count);
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if (exit_qual)
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goto fail;
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/*
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@ -1097,6 +1097,7 @@ static u32 msr_based_features[] = {
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MSR_F10H_DECFG,
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MSR_IA32_UCODE_REV,
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MSR_IA32_ARCH_CAPABILITIES,
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};
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static unsigned int num_msr_based_features;
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@ -1105,7 +1106,8 @@ static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
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{
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switch (msr->index) {
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case MSR_IA32_UCODE_REV:
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rdmsrl(msr->index, msr->data);
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case MSR_IA32_ARCH_CAPABILITIES:
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rdmsrl_safe(msr->index, &msr->data);
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break;
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default:
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if (kvm_x86_ops->get_msr_feature(msr))
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@ -119,8 +119,12 @@ irqfd_shutdown(struct work_struct *work)
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{
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struct kvm_kernel_irqfd *irqfd =
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container_of(work, struct kvm_kernel_irqfd, shutdown);
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struct kvm *kvm = irqfd->kvm;
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u64 cnt;
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/* Make sure irqfd has been initalized in assign path. */
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synchronize_srcu(&kvm->irq_srcu);
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/*
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* Synchronize with the wait-queue and unhook ourselves to prevent
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* further events.
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@ -387,7 +391,6 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args)
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idx = srcu_read_lock(&kvm->irq_srcu);
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irqfd_update(kvm, irqfd);
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srcu_read_unlock(&kvm->irq_srcu, idx);
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list_add_tail(&irqfd->list, &kvm->irqfds.items);
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@ -402,11 +405,6 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args)
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if (events & EPOLLIN)
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schedule_work(&irqfd->inject);
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/*
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* do not drop the file until the irqfd is fully initialized, otherwise
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* we might race against the EPOLLHUP
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*/
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fdput(f);
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#ifdef CONFIG_HAVE_KVM_IRQ_BYPASS
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if (kvm_arch_has_irq_bypass()) {
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irqfd->consumer.token = (void *)irqfd->eventfd;
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@ -421,6 +419,13 @@ kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args)
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}
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#endif
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srcu_read_unlock(&kvm->irq_srcu, idx);
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/*
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* do not drop the file until the irqfd is fully initialized, otherwise
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* we might race against the EPOLLHUP
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*/
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fdput(f);
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return 0;
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fail:
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