From 5b167c123b3c3582f62cf1896465019bc40fe526 Mon Sep 17 00:00:00 2001 From: Kamal Dasu Date: Fri, 14 Jun 2013 17:10:03 +0000 Subject: [PATCH 1/7] MIPS: Fix get_user_page_fast() for mips with cache alias get_user_pages_fast() is missing cache flushes for MIPS platforms with cache aliases. Filesystem failures observed with DirectIO operations due to missing flush_anon_page() that use page coloring logic to work with cache aliases. This fix falls through to take slow_irqon path that calls get_user_pages() that has required logic for platforms where cpu_has_dc_aliases is true. [ralf@linux-mips.org: Explicity include .] Signed-off-by: Kamal Dasu Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/5469/ Signed-off-by: Ralf Baechle --- arch/mips/mm/gup.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/mm/gup.c b/arch/mips/mm/gup.c index d4ea5c9c4a93..06ce17c2a905 100644 --- a/arch/mips/mm/gup.c +++ b/arch/mips/mm/gup.c @@ -12,6 +12,7 @@ #include #include +#include #include static inline pte_t gup_get_pte(pte_t *ptep) @@ -273,7 +274,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write, len = (unsigned long) nr_pages << PAGE_SHIFT; end = start + len; - if (end < start) + if (end < start || cpu_has_dc_aliases) goto slow_irqon; /* XXX: batch / limit 'nr' */ From afddce0cc9f22c72e6ee7350a0e90b04aaa470b2 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Tue, 3 Sep 2013 01:29:58 +0100 Subject: [PATCH 2/7] MIPS: R4k clock source initialization bug fix This is a fix for a bug introduced with commit 447cdf2628b59aa513a42785450b348dced26d8a, submitted as archived here: http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20080312235002.c717dde3.yoichi_yuasa%40tripeaks.co.jp regrettably with no further explanation. The issue is with the CP0 Count register read erratum present on R4000 and some R4400 processors. If this erratum is present, then a read from this register that happens around the time it reaches the value stored in the CP0 Compare register causes a CP0 timer interrupt that is supposed to happen when the values in the two registers match to be missed. The implication for the chips affected is the CP0 timer can be used either as a source of a timer interrupt (a clock event) or as a source of a high-resolution counter (a clock source), but not both at a time. The erratum does not affect timer interrupt operation itself, because in this case the CP0 Count register is only read while the timer interrupt has already been raised, while high-resolution counter references happen at random times. Additionally some systems apparently have issues with the timer interrupt line being routed externally and not following the usual CP0 Count/Compare semantics. In this case we don't want to use the R4k clock event. We've meant to address the erratum and the timer interrupt routing issue in time_init, however the commit referred to above broke our solution. What we currently have is we enable the R4k clock source if the R4k clock event initialization has succeeded (the timer is present and has no timer interrupt routing issue) or there is no CP0 Count register read erratum. Which gives the following boolean matrix: clock event | count erratum => clock source ------------+---------------+-------------- 0 | 0 | 1 (OK) 0 | 1 | 0 (bug!) -> no interference, could use 1 | 0 | 1 (OK) 1 | 1 | 1 (bug!) -> can't use, interference What we want instead is to enable the R4k clock source if there is no CP0 Count register read erratum (obviously) or the R4k clock event initialization has *failed* -- because in the latter case we won't be using the timer interrupt anyway, so we don't care about any interference CP0 Count reads might cause with the interrupt. This corresponds to the following boolean matrix: clock event | count erratum => clock source ------------+---------------+-------------- 0 | 0 | 1 0 | 1 | 1 1 | 0 | 1 1 | 1 | 0 This is implemented here, effectively reverting the problematic commit, and a short explanation is given next to code modified so that the rationale is known to future readers and confusion is prevented from happening here again. It is worth noting that mips_clockevent_init returns 0 upon success while cpu_has_mfc0_count_bug returns 0 upon failure. This is because the former function returns an error code while the latter returns a boolean value. To signify the difference I have therefore chosen to compare the result of the former call explicitly against 0. Signed-off-by: Maciej W. Rozycki Signed-off-by: Ralf Baechle Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5799/ --- arch/mips/kernel/time.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 9d686bf97b0e..364d26ae4215 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -121,6 +121,14 @@ void __init time_init(void) { plat_time_init(); - if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug()) + /* + * The use of the R4k timer as a clock event takes precedence; + * if reading the Count register might interfere with the timer + * interrupt, then we don't use the timer as a clock source. + * We may still use the timer as a clock source though if the + * timer interrupt isn't reliable; the interference doesn't + * matter then, because we don't use the interrupt. + */ + if (mips_clockevent_init() != 0 || !cpu_has_mfc0_count_bug()) init_mips_clocksource(); } From 05f226391d800b0b7696125eb9a13273ea9018f8 Mon Sep 17 00:00:00 2001 From: Corey Minyard Date: Mon, 15 Jul 2013 15:17:17 -0700 Subject: [PATCH 3/7] MIPS: Ftrace: Fix function tracing return address to match Dynamic function tracing was not working on MIPS. When doing dynamic tracing, the tracer attempts to match up the passed in address with the one the compiler creates in the mcount tables. The MIPS code was passing in the return address from the tracing function call, but the compiler tables were the address of the function call. So they wouldn't match. Just subtracting 8 from the return address will give the address of the function call. Easy enough. Signed-off-by: Corey Minyard [david.daney@cavium.com: Adjusted code comment and patch Subject.] Signed-off-by: David Daney Cc: linux-mips@linux-mips.org Cc: Steven Rostedt Signed-off-by: Ralf Baechle Patchwork: https://patchwork.linux-mips.org/patch/5592/ --- arch/mips/kernel/mcount.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S index a03e93c4a946..539b6294b613 100644 --- a/arch/mips/kernel/mcount.S +++ b/arch/mips/kernel/mcount.S @@ -83,7 +83,7 @@ _mcount: PTR_S MCOUNT_RA_ADDRESS_REG, PT_R12(sp) #endif - move a0, ra /* arg1: self return address */ + PTR_SUBU a0, ra, 8 /* arg1: self address */ .globl ftrace_call ftrace_call: nop /* a placeholder for the call to a real tracing function */ From 8510376e59adffb4fb890d936a59d6f2e42b86b3 Mon Sep 17 00:00:00 2001 From: Markos Chandras Date: Thu, 4 Jul 2013 09:38:29 +0100 Subject: [PATCH 4/7] MIPS: Loongson: Hide the pci code behind CONFIG_PCI The pci.c code depends on symbols which are only visible if CONFIG_PCI is selected. Also fixes the following problem on loongson allnoconfig: arch/mips/built-in.o: In function `pcibios_init': pci.c:(.init.text+0x528): undefined reference to `register_pci_controller' arch/mips/built-in.o:(.data+0xc): undefined reference to `loongson_pci_ops' Signed-off-by: Markos Chandras Acked-by: Steven J. Hill Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5584/ Signed-off-by: Ralf Baechle --- arch/mips/loongson/common/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile index 4c57b3e5743f..9e4484ccbb03 100644 --- a/arch/mips/loongson/common/Makefile +++ b/arch/mips/loongson/common/Makefile @@ -3,8 +3,9 @@ # obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \ - pci.o bonito-irq.o mem.o machtype.o platform.o + bonito-irq.o mem.o machtype.o platform.o obj-$(CONFIG_GPIOLIB) += gpio.o +obj-$(CONFIG_PCI) += pci.o # # Serial port support From c8acd40d38a7a2a82fb2e2fc59e5035643bb44d1 Mon Sep 17 00:00:00 2001 From: Markos Chandras Date: Wed, 14 Aug 2013 09:57:16 +0100 Subject: [PATCH 5/7] MIPS: TXx9: Fix build error if CONFIG_TOSHIBA_JMR3927 is not selected The jmr3927_vec txx9_board_vec struct is defined in txx9/jmr3927/setup.c which is only built if CONFIG_TOSHIBA_JMR3927 is selected. This patch fixes the following build problem: arch/mips/txx9/generic/setup.c: In function 'select_board': arch/mips/txx9/generic/setup.c:354:20: error: 'jmr3927_vec' undeclared (first use in this function) arch/mips/txx9/generic/setup.c:354:20: note: each undeclared identifier is reported only once for each function it appears in make[3]: *** [arch/mips/txx9/generic/setup.o] Error 1 Signed-off-by: Markos Chandras Acked-by: Steven J. Hill Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5713/ Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 681e7f86c080..2b0b83c171e0 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -350,7 +350,7 @@ static void __init select_board(void) } /* select "default" board */ -#ifdef CONFIG_CPU_TX39XX +#ifdef CONFIG_TOSHIBA_JMR3927 txx9_board_vec = &jmr3927_vec; #endif #ifdef CONFIG_CPU_TX49XX From c5eaff3e857e748da9202870b35ba236b6f276c9 Mon Sep 17 00:00:00 2001 From: Markos Chandras Date: Wed, 21 Aug 2013 16:01:48 +0100 Subject: [PATCH 6/7] MIPS: Kconfig: Drop obsolete NR_CPUS_DEFAULT_{1,2} options The NR_CPUS_DEFAULT_1 introduced as an aid for the QEMU platform in 72ede9b18967e7a8a62a88f164f003193f6d891f "[MIPS] Qemu: Fix Symmetric Uniprocessor support" which was later removed in 302922e5f6901eb6f29c58539631f71b3d9746b8 "[MIPS] Qemu: Remove platform." On certain randconfigs it may happen for NR_CPUS to have an empty value because not all SMP platforms select a suitable NR_CPUS_DEFAULT_* value. We fix this by restoring the range of NR_CPUS to 2..64 and drop the NR_CPUS_DEFAULT_{1,2} symbols. The first one is no longer used and the latter is not needed since NR_CPUS=2 is now the default value. Fixes the following problem on a randconfig: .config:164:warning: symbol value '' invalid for NR_CPUS Signed-off-by: Markos Chandras Acked-by: Steven J. Hill Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5747/ Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index e12764c2a9d0..b69b4e4f55df 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -131,7 +131,6 @@ config BCM63XX select IRQ_CPU select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348 - select NR_CPUS_DEFAULT_2 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_HAS_EARLY_PRINTK @@ -609,7 +608,6 @@ config SIBYTE_SWARM select BOOT_ELF32 select DMA_COHERENT select HAVE_PATA_PLATFORM - select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -623,7 +621,6 @@ config SIBYTE_LITTLESUR select BOOT_ELF32 select DMA_COHERENT select HAVE_PATA_PLATFORM - select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -635,7 +632,6 @@ config SIBYTE_SENTOSA bool "Sibyte BCM91250E-Sentosa" select BOOT_ELF32 select DMA_COHERENT - select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -1862,7 +1858,6 @@ config MIPS_MT_SMP select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI select MIPS_MT - select NR_CPUS_DEFAULT_2 select SMP select SYS_SUPPORTS_SCHED_SMT if SMP select SYS_SUPPORTS_SMP @@ -2173,12 +2168,6 @@ config SYS_SUPPORTS_MIPS_CMP config SYS_SUPPORTS_SMP bool -config NR_CPUS_DEFAULT_1 - bool - -config NR_CPUS_DEFAULT_2 - bool - config NR_CPUS_DEFAULT_4 bool @@ -2196,10 +2185,8 @@ config NR_CPUS_DEFAULT_64 config NR_CPUS int "Maximum number of CPUs (2-64)" - range 1 64 if NR_CPUS_DEFAULT_1 + range 2 64 depends on SMP - default "1" if NR_CPUS_DEFAULT_1 - default "2" if NR_CPUS_DEFAULT_2 default "4" if NR_CPUS_DEFAULT_4 default "8" if NR_CPUS_DEFAULT_8 default "16" if NR_CPUS_DEFAULT_16 From f7c1285f0eba8e0910decc0fa5b409f886e4358e Mon Sep 17 00:00:00 2001 From: Markos Chandras Date: Tue, 3 Sep 2013 15:21:59 +0100 Subject: [PATCH 7/7] MIPS: powertv: Drop BOOTLOADER_DRIVER Kconfig symbol The kbldr.h header file required for this was neither committed in the original submission in a3a0f8c8ed2e2470f4dcd6da95020d41fed84747 "MIPS: PowerTV: Base files for Cisco PowerTV platform" nor was it ever present in the git tree so this option never worked. Fixes the following build problem: arch/mips/powertv/reset.c:25:36: fatal error: asm/mach-powertv/kbldr.h: No such file or directory compilation terminated. Cc: David VomLehn Signed-off-by: Markos Chandras Acked-by: Steven J. Hill Cc: linux-mips@linux-mips.org Cc: David VomLehn Patchwork: https://patchwork.linux-mips.org/patch/5801/ Signed-off-by: Ralf Baechle --- arch/mips/powertv/Kconfig | 9 +-------- arch/mips/powertv/asic/asic_devices.c | 12 +----------- arch/mips/powertv/init.c | 4 ---- arch/mips/powertv/reset.c | 12 ------------ 4 files changed, 2 insertions(+), 35 deletions(-) diff --git a/arch/mips/powertv/Kconfig b/arch/mips/powertv/Kconfig index 1a1b03ea6398..dd91fbacbcba 100644 --- a/arch/mips/powertv/Kconfig +++ b/arch/mips/powertv/Kconfig @@ -1,14 +1,7 @@ -config BOOTLOADER_DRIVER - bool "PowerTV Bootloader Driver Support" - default n - depends on POWERTV - help - Use this option if you want to load bootloader driver. - config BOOTLOADER_FAMILY string "POWERTV Bootloader Family string" default "85" - depends on POWERTV && !BOOTLOADER_DRIVER + depends on POWERTV help This value should be specified when the bootloader driver is disabled and must be exactly two characters long. Families supported are: diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c index 0238af1ba503..8380605d597d 100644 --- a/arch/mips/powertv/asic/asic_devices.c +++ b/arch/mips/powertv/asic/asic_devices.c @@ -147,20 +147,10 @@ static __init noinline void platform_set_family(void) if (check_forcefamily(forced_family) == 0) bootldr_family = BOOTLDRFAMILY(forced_family[0], forced_family[1]); - else { - -#ifdef CONFIG_BOOTLOADER_DRIVER - bootldr_family = (unsigned short) kbldr_GetSWFamily(); -#else -#if defined(CONFIG_BOOTLOADER_FAMILY) + else bootldr_family = (unsigned short) BOOTLDRFAMILY( CONFIG_BOOTLOADER_FAMILY[0], CONFIG_BOOTLOADER_FAMILY[1]); -#else -#error "Unknown Bootloader Family" -#endif -#endif - } pr_info("Bootloader Family = 0x%04X\n", bootldr_family); diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c index a01baff52cae..498926377e51 100644 --- a/arch/mips/powertv/init.c +++ b/arch/mips/powertv/init.c @@ -87,8 +87,4 @@ void __init prom_init(void) configure_platform(); prom_meminit(); - -#ifndef CONFIG_BOOTLOADER_DRIVER - pr_info("\nBootloader driver isn't loaded...\n"); -#endif } diff --git a/arch/mips/powertv/reset.c b/arch/mips/powertv/reset.c index 0007652cb774..11c32fbf2784 100644 --- a/arch/mips/powertv/reset.c +++ b/arch/mips/powertv/reset.c @@ -21,24 +21,12 @@ #include #include /* Not included by linux/reboot.h */ -#ifdef CONFIG_BOOTLOADER_DRIVER -#include -#endif - #include #include "reset.h" static void mips_machine_restart(char *command) { -#ifdef CONFIG_BOOTLOADER_DRIVER - /* - * Call the bootloader's reset function to ensure - * that persistent data is flushed before hard reset - */ - kbldr_SetCauseAndReset(); -#else writel(0x1, asic_reg_addr(watchdog)); -#endif } void mips_reboot_setup(void)