forked from luck/tmp_suning_uos_patched
ixgbe: Cleanup some whitespace issues, fixup and add some comments
Cleanup a bit of whitespace, add some function header comments, and fix a few comments around the driver. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Acked-by: Mallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -404,8 +404,7 @@ s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw)
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{
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s32 status = 0;
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ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_82599_AUTONEG;
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status = ixgbe_setup_mac_link_speed_multispeed_fiber(hw,
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link_speed,
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status = ixgbe_setup_mac_link_speed_multispeed_fiber(hw, link_speed,
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true, true);
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return status;
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}
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@ -759,7 +758,7 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
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hw->mac.orig_autoc = autoc;
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hw->mac.orig_autoc2 = autoc2;
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hw->mac.orig_link_settings_stored = true;
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} else {
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} else {
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if (autoc != hw->mac.orig_autoc)
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IXGBE_WRITE_REG(hw, IXGBE_AUTOC, (hw->mac.orig_autoc |
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IXGBE_AUTOC_AN_RESTART));
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@ -779,7 +779,8 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
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q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
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/* Populate the IVAR table and set the ITR values to the
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/*
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* Populate the IVAR table and set the ITR values to the
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* corresponding register.
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*/
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for (v_idx = 0; v_idx < q_vectors; v_idx++) {
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@ -814,7 +815,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
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q_vector->eitr = adapter->eitr_param;
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/*
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* since ths is initial set up don't need to call
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* since this is initial set up don't need to call
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* ixgbe_write_eitr helper
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*/
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
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@ -2675,6 +2676,14 @@ static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
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}
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#endif
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/**
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* ixgbe_set_rss_queues: Allocate queues for RSS
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* @adapter: board private structure to initialize
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*
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* This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
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* to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
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*
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**/
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static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
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{
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bool ret = false;
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@ -2693,6 +2702,17 @@ static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
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return ret;
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}
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/*
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* ixgbe_set_num_queues: Allocate queues for device, feature dependant
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* @adapter: board private structure to initialize
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*
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* This is the top level queue allocation routine. The order here is very
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* important, starting with the "most" number of features turned on at once,
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* and ending with the smallest set of features. This way large combinations
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* can be allocated if they're turned on, and smaller combinations are the
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* fallthrough conditions.
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*
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**/
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static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
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{
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/* Start with base case */
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@ -2856,7 +2876,8 @@ static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
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* @adapter: board private structure to initialize
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*
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* We allocate one ring per queue at run-time since we don't know the
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* number of queues at compile-time.
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* number of queues at compile-time. The polling_netdev array is
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* intended for Multiqueue, but should work fine with a single queue.
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**/
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static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
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{
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@ -3035,7 +3056,8 @@ static void ixgbe_sfp_timer(unsigned long data)
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{
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struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
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/* Do the sfp_timer outside of interrupt context due to the
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/*
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* Do the sfp_timer outside of interrupt context due to the
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* delays that sfp+ detection requires
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*/
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schedule_work(&adapter->sfp_task);
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@ -3609,6 +3631,7 @@ static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
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retval = pci_save_state(pdev);
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if (retval)
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return retval;
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#endif
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if (wufc) {
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ixgbe_set_rx_mode(netdev);
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