forked from luck/tmp_suning_uos_patched
[PATCH] m68k: cleanup generic irq names
Rename IRQ1..IRQ7 to IRQ_AUTO_1..IRQ_AUTO_7 and remove the duplicate defintions. Signed-off-by: Roman Zippel <zippel@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -153,7 +153,7 @@ int cpu_request_irq(unsigned int irq,
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irqreturn_t (*handler)(int, void *, struct pt_regs *),
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unsigned long flags, const char *devname, void *dev_id)
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{
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if (irq < IRQ1 || irq > IRQ7) {
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if (irq < IRQ_AUTO_1 || irq > IRQ_AUTO_7) {
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printk("%s: Incorrect IRQ %d from %s\n",
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__FUNCTION__, irq, devname);
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return -ENXIO;
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@ -183,7 +183,7 @@ int cpu_request_irq(unsigned int irq,
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void cpu_free_irq(unsigned int irq, void *dev_id)
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{
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if (irq < IRQ1 || irq > IRQ7) {
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if (irq < IRQ_AUTO_1 || irq > IRQ_AUTO_7) {
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printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
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return;
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}
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@ -93,8 +93,8 @@ void q40_init_IRQ (void)
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}
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/* setup handler for ISA ints */
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cpu_request_irq(IRQ2, q40_irq2_handler, 0, "q40 ISA and master chip",
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NULL);
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cpu_request_irq(IRQ_AUTO_2, q40_irq2_handler, 0,
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"q40 ISA and master chip", NULL);
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/* now enable some ints.. */
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master_outb(1,EXT_ENABLE_REG); /* ISA IRQ 5-15 */
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@ -55,7 +55,7 @@ static char *version = "sun3lance.c: v1.2 1/12/2001 Sam Creasey (sammy@sammy.ne
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/* sun3/60 addr/irq for the lance chip. If your sun is different,
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change this. */
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#define LANCE_OBIO 0x120000
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#define LANCE_IRQ IRQ3
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#define LANCE_IRQ IRQ_AUTO_3
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/* Debug level:
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* 0 = silent, print only serious errors
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@ -45,17 +45,6 @@
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#define IRQ_TYPE_FAST 1
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#define IRQ_TYPE_PRIO 2
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#define IRQ_SPURIOUS (0)
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/* auto-vector interrupts */
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#define IRQ_AUTO_1 (1)
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#define IRQ_AUTO_2 (2)
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#define IRQ_AUTO_3 (3)
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#define IRQ_AUTO_4 (4)
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#define IRQ_AUTO_5 (5)
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#define IRQ_AUTO_6 (6)
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#define IRQ_AUTO_7 (7)
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/* ST-MFP interrupts */
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#define IRQ_MFP_BUSY (8)
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#define IRQ_MFP_DCD (9)
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@ -4,7 +4,7 @@
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#include <linux/interrupt.h>
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/*
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* # of m68k interrupts
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* # of m68k auto vector interrupts
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*/
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#define SYS_IRQS 8
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@ -40,19 +40,17 @@
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* that routine requires service.
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*/
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#define IRQ1 (1) /* level 1 interrupt */
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#define IRQ2 (2) /* level 2 interrupt */
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#define IRQ3 (3) /* level 3 interrupt */
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#define IRQ4 (4) /* level 4 interrupt */
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#define IRQ5 (5) /* level 5 interrupt */
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#define IRQ6 (6) /* level 6 interrupt */
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#define IRQ7 (7) /* level 7 interrupt (non-maskable) */
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#define IRQ_SPURIOUS 0
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/*
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* "Generic" interrupt sources
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*/
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#define IRQ_AUTO_1 1 /* level 1 interrupt */
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#define IRQ_AUTO_2 2 /* level 2 interrupt */
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#define IRQ_AUTO_3 3 /* level 3 interrupt */
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#define IRQ_AUTO_4 4 /* level 4 interrupt */
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#define IRQ_AUTO_5 5 /* level 5 interrupt */
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#define IRQ_AUTO_6 6 /* level 6 interrupt */
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#define IRQ_AUTO_7 7 /* level 7 interrupt (non-maskable) */
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#define IRQ_SCHED_TIMER (8) /* interrupt source for scheduling timer */
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#define IRQ_USER 8
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static __inline__ int irq_canonicalize(int irq)
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{
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@ -59,17 +59,6 @@
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#define IRQ_SRC(irq) (irq >> 3)
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#define IRQ_IDX(irq) (irq & 7)
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#define IRQ_SPURIOUS (0)
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/* auto-vector interrupts */
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#define IRQ_AUTO_1 (1)
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#define IRQ_AUTO_2 (2)
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#define IRQ_AUTO_3 (3)
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#define IRQ_AUTO_4 (4)
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#define IRQ_AUTO_5 (5)
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#define IRQ_AUTO_6 (6)
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#define IRQ_AUTO_7 (7)
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/* VIA1 interrupts */
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#define IRQ_VIA1_0 (8) /* one second int. */
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#define IRQ_VIA1_1 (9) /* VBlank int. */
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