forked from luck/tmp_suning_uos_patched
parisc: don't set ARCH_NO_COHERENT_DMA_MMAP
parisc is the only architecture that sets ARCH_NO_COHERENT_DMA_MMAP when an MMU is enabled. AFAIK this is because parisc CPUs use VIVT caches, which means exporting normally cachable memory to userspace is relatively dangrous due to cache aliasing. But normally cachable memory is only allocated by dma_alloc_coherent on parisc when using the sba_iommu or ccio_iommu drivers, so just remove the .mmap implementation for them so that we don't have to set ARCH_NO_COHERENT_DMA_MMAP, which I plan to get rid of. Signed-off-by: Christoph Hellwig <hch@lst.de>
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@ -52,7 +52,6 @@ config PARISC
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select GENERIC_SCHED_CLOCK
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select HAVE_UNSTABLE_SCHED_CLOCK if SMP
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select GENERIC_CLOCKEVENTS
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select ARCH_NO_COHERENT_DMA_MMAP
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select CPU_NO_EFFICIENT_FFS
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select NEED_DMA_MAP_STATE
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select NEED_SG_DMA_LENGTH
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@ -1024,7 +1024,6 @@ static const struct dma_map_ops ccio_ops = {
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.unmap_page = ccio_unmap_page,
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.map_sg = ccio_map_sg,
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.unmap_sg = ccio_unmap_sg,
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.mmap = dma_common_mmap,
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.get_sgtable = dma_common_get_sgtable,
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};
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@ -1084,7 +1084,6 @@ static const struct dma_map_ops sba_ops = {
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.unmap_page = sba_unmap_page,
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.map_sg = sba_map_sg,
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.unmap_sg = sba_unmap_sg,
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.mmap = dma_common_mmap,
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.get_sgtable = dma_common_get_sgtable,
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};
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