forked from luck/tmp_suning_uos_patched
sparc: Fix handling of LANCE and ESP parent nodes in of_device.c
The device nodes that sit above 'esp' and 'le' on SBUS lack a 'ranges' property, but we should pass the translation up to the parent node so that the SBUS level ranges get applied. Based upon a bug report from Robert Reif. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -344,6 +344,27 @@ static int __init build_one_resource(struct device_node *parent,
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return 1;
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}
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static int __init use_1to1_mapping(struct device_node *pp)
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{
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/* If we have a ranges property in the parent, use it. */
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if (of_find_property(pp, "ranges", NULL) != NULL)
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return 0;
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/* Some SBUS devices use intermediate nodes to express
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* hierarchy within the device itself. These aren't
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* real bus nodes, and don't have a 'ranges' property.
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* But, we should still pass the translation work up
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* to the SBUS itself.
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*/
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if (!strcmp(pp->name, "dma") ||
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!strcmp(pp->name, "espdma") ||
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!strcmp(pp->name, "ledma") ||
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!strcmp(pp->name, "lebuffer"))
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return 0;
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return 1;
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}
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static int of_resource_verbose;
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static void __init build_device_resources(struct of_device *op,
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@ -389,10 +410,7 @@ static void __init build_device_resources(struct of_device *op,
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memcpy(addr, reg, na * 4);
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/* If the immediate parent has no ranges property to apply,
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* just use a 1<->1 mapping.
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*/
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if (of_find_property(pp, "ranges", NULL) == NULL) {
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if (use_1to1_mapping(pp)) {
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result = of_read_addr(addr, na);
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goto build_res;
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}
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@ -438,8 +438,17 @@ static int __init use_1to1_mapping(struct device_node *pp)
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/* If the parent is the dma node of an ISA bus, pass
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* the translation up to the root.
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*
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* Some SBUS devices use intermediate nodes to express
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* hierarchy within the device itself. These aren't
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* real bus nodes, and don't have a 'ranges' property.
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* But, we should still pass the translation work up
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* to the SBUS itself.
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*/
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if (!strcmp(pp->name, "dma"))
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if (!strcmp(pp->name, "dma") ||
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!strcmp(pp->name, "espdma") ||
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!strcmp(pp->name, "ledma") ||
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!strcmp(pp->name, "lebuffer"))
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return 0;
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/* Similarly for all PCI bridges, if we get this far
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