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dt-bindings: dmaengine: dw-dmac: add protection control property

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This patch for the DesignWare AHB Central
Direct Memory Access Controller adds the dma
protection control property:
	"snps,dma-protection-control"

as well as the properties specific values defines into
a new include file: include/dt-bindings/dma/dw-dmac.h

Note: The protection control signals are one-to-one
mapped to the AHB HPROT[1:3] signals for this controller.
The HPROT0 (Data Access) is always hardwired to 1.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Christian Lamparter 2018-11-17 17:17:20 +01:00 committed by Vinod Koul
parent 651022382c
commit 538098281c
3 changed files with 21 additions and 1 deletions
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4
Documentation/devicetree/bindings/dma/snps-dma.txt
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@ -27,6 +27,10 @@ Optional properties:
general purpose DMA channel allocator. False if not passed.
- multi-block: Multi block transfers supported by hardware. Array property with
one cell per channel. 0: not supported, 1 (default): supported.
- snps,dma-protection-control: AHB HPROT[3:1] protection setting.
The default value is 0 (for non-cacheable, non-buffered,
unprivileged data access).
Refer to include/dt-bindings/dma/dw-dmac.h for possible values.
Example:

4
MAINTAINERS
View File

@ -14363,9 +14363,11 @@ SYNOPSYS DESIGNWARE DMAC DRIVER
M: Viresh Kumar <vireshk@kernel.org>
R: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
S: Maintained
F: Documentation/devicetree/bindings/dma/snps-dma.txt
F: drivers/dma/dw/
F: include/dt-bindings/dma/dw-dmac.h
F: include/linux/dma/dw.h
F: include/linux/platform_data/dma-dw.h
F: drivers/dma/dw/
SYNOPSYS DESIGNWARE ENTERPRISE ETHERNET DRIVER
M: Jose Abreu <Jose.Abreu@synopsys.com>

14
include/dt-bindings/dma/dw-dmac.h Normal file
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@ -0,0 +1,14 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
#define __DT_BINDINGS_DMA_DW_DMAC_H__
/*
* Protection Control bits provide protection against illegal transactions.
* The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals.
*/
#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */
#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */
#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */