dt-bindings: bus: Document breakpoint interrupt for gisb-arb

The GISB arbiter can have a third and optional interrupt to handle GISB
breakpoints.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Florian Fainelli 2020-04-17 17:11:46 -07:00
parent 10e7dd54cd
commit 541b6e6ee7

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@ -10,7 +10,8 @@ Required properties:
"brcm,bcm7038-gisb-arb" for 130nm chips
- reg: specifies the base physical address and size of the registers
- interrupts: specifies the two interrupts (timeout and TEA) to be used from
the parent interrupt controller
the parent interrupt controller. A third optional interrupt may be specified
for breakpoints.
Optional properties: