forked from luck/tmp_suning_uos_patched
scripts/spelling.txt: add "aligment" pattern and fix typo instances
Fix typos and add the following to the scripts/spelling.txt: aligment||alignment I did not touch the "N_BYTE_ALIGMENT" macro in drivers/net/wireless/realtek/rtlwifi/wifi.h to avoid unpredictable impact. I fixed "_aligment_handler" in arch/openrisc/kernel/entry.S because it is surrounded by #if 0 ... #endif. It is surely safe and I confirmed "_alignment_handler" is correct. I also fixed the "controler" I found in the same hunk in arch/openrisc/kernel/head.S. Link: http://lkml.kernel.org/r/1481573103-11329-8-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Masahiro Yamada
Linus Torvalds
parent
8ab102d60a
commit
550116d21a
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@ -1051,9 +1051,9 @@ int arc_unwind(struct unwind_frame_info *frame)
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++ptr;
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}
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if (cie != NULL) {
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/* get code aligment factor */
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/* get code alignment factor */
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state.codeAlign = get_uleb128(&ptr, end);
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/* get data aligment factor */
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/* get data alignment factor */
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state.dataAlign = get_sleb128(&ptr, end);
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if (state.codeAlign == 0 || state.dataAlign == 0 || ptr >= end)
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cie = NULL;
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@ -319,7 +319,7 @@ EXCEPTION_ENTRY(_timer_handler)
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l.j _ret_from_intr
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l.nop
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/* ---[ 0x600: Aligment exception ]-------------------------------------- */
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/* ---[ 0x600: Alignment exception ]-------------------------------------- */
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EXCEPTION_ENTRY(_alignment_handler)
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CLEAR_LWA_FLAG(r3)
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@ -331,7 +331,7 @@ EXCEPTION_ENTRY(_alignment_handler)
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l.nop
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#if 0
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EXCEPTION_ENTRY(_aligment_handler)
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EXCEPTION_ENTRY(_alignment_handler)
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// l.mfspr r2,r0,SPR_EEAR_BASE /* Load the efective addres */
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l.addi r2,r4,0
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// l.mfspr r5,r0,SPR_EPCR_BASE /* Load the insn address */
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@ -325,7 +325,7 @@ _dispatch_do_ipage_fault:
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.org 0x500
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EXCEPTION_HANDLE(_timer_handler)
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/* ---[ 0x600: Aligment exception ]-------------------------------------- */
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/* ---[ 0x600: Alignment exception ]-------------------------------------- */
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.org 0x600
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EXCEPTION_HANDLE(_alignment_handler)
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@ -640,8 +640,8 @@ _flush_tlb:
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/* ========================================[ cache ]=== */
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/* aligment here so we don't change memory offsets with
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* memory controler defined
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/* alignment here so we don't change memory offsets with
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* memory controller defined
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*/
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.align 0x2000
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@ -19,8 +19,8 @@
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/* TODO
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* - clean up __offset & stuff
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* - change all 8192 aligment to PAGE !!!
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* - recheck if all aligments are really needed
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* - change all 8192 alignment to PAGE !!!
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* - recheck if all alignments are really needed
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*/
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# define LOAD_OFFSET PAGE_OFFSET
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@ -188,7 +188,7 @@
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#define HW_ASSISTED_I2C_STATUS_FAILURE 2
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#define HW_ASSISTED_I2C_STATUS_SUCCESS 1
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#pragma pack(1) // BIOS data must use byte aligment
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#pragma pack(1) // BIOS data must use byte alignment
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// Define offset to location of ROM header.
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#define OFFSET_TO_POINTER_TO_ATOM_ROM_HEADER 0x00000048L
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@ -9180,7 +9180,7 @@ typedef struct _ATOM_POWERPLAY_INFO_V3
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/*********************************************************************************/
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#pragma pack() // BIOS data must use byte aligment
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#pragma pack() // BIOS data must use byte alignment
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#pragma pack(1)
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@ -9211,7 +9211,7 @@ typedef struct _ATOM_SERVICE_INFO
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#pragma pack() // BIOS data must use byte aligment
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#pragma pack() // BIOS data must use byte alignment
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//
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// AMD ACPI Table
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@ -60,7 +60,7 @@ render_state_get_rodata(const struct intel_engine_cs *engine)
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* this is sufficient as the null state generator makes the final batch
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* with two passes to build command and state separately. At this point
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* the size of both are known and it compacts them by relocating the state
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* right after the commands taking care of aligment so we should sufficient
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* right after the commands taking care of alignment so we should sufficient
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* space below them for adding new commands.
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*/
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#define OUT_BATCH(batch, i, val) \
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@ -181,7 +181,7 @@
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#define HW_ASSISTED_I2C_STATUS_FAILURE 2
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#define HW_ASSISTED_I2C_STATUS_SUCCESS 1
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#pragma pack(1) /* BIOS data must use byte aligment */
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#pragma pack(1) /* BIOS data must use byte alignment */
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/* Define offset to location of ROM header. */
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@ -7909,7 +7909,7 @@ typedef struct _ATOM_POWERPLAY_INFO_V3
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/*********************************************************************************/
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#pragma pack() // BIOS data must use byte aligment
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#pragma pack() // BIOS data must use byte alignment
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//
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// AMD ACPI Table
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@ -358,7 +358,7 @@ struct fimc_pix_limit {
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* @pix_limit: pixel size constraints for the scaler
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* @min_inp_pixsize: minimum input pixel size
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* @min_out_pixsize: minimum output pixel size
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* @hor_offs_align: horizontal pixel offset aligment
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* @hor_offs_align: horizontal pixel offset alignment
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* @min_vsize_align: minimum vertical pixel size alignment
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*/
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struct fimc_variant {
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@ -59,13 +59,13 @@ static const struct ani_ofdm_level_entry ofdm_level_table[] = {
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/*
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* MRC (Maximal Ratio Combining) has always been used with multi-antenna ofdm.
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* With OFDM for single stream you just add up all antenna inputs, you're
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* only interested in what you get after FFT. Signal aligment is also not
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* only interested in what you get after FFT. Signal alignment is also not
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* required for OFDM because any phase difference adds up in the frequency
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* domain.
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*
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* MRC requires extra work for use with CCK. You need to align the antenna
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* signals from the different antenna before you can add the signals together.
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* You need aligment of signals as CCK is in time domain, so addition can cancel
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* You need alignment of signals as CCK is in time domain, so addition can cancel
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* your signal completely if phase is 180 degrees (think of adding sine waves).
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* You also need to remove noise before the addition and this is where ANI
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* MRC CCK comes into play. One of the antenna inputs may be stronger but
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@ -455,7 +455,7 @@ static u32 _rtl92s_fill_h2c_cmd(struct sk_buff *skb, u32 h2cbufferlen,
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u8 i = 0;
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do {
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/* 8 - Byte aligment */
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/* 8 - Byte alignment */
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len = H2C_TX_CMD_HDR_LEN + N_BYTE_ALIGMENT(pcmd_len[i], 8);
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/* Buffer length is not enough */
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@ -504,7 +504,7 @@ static u32 _rtl92s_get_h2c_cmdlen(u32 h2cbufferlen, u32 cmd_num, u32 *pcmd_len)
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u8 i = 0;
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do {
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/* 8 - Byte aligment */
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/* 8 - Byte alignment */
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len = H2C_TX_CMD_HDR_LEN + N_BYTE_ALIGMENT(pcmd_len[i], 8);
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/* Buffer length is not enough */
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@ -680,7 +680,7 @@ struct bfi_ioim_req_s {
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/*
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* SG elements array within the IO request must be double word
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* aligned. This aligment is required to optimize SGM setup for the IO.
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* aligned. This alignment is required to optimize SGM setup for the IO.
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*/
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struct bfi_sge_s sges[BFI_SGE_INLINE_MAX];
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u8 io_timeout;
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@ -667,7 +667,7 @@ int xt_compat_check_entry_offsets(const void *base, const char *elems,
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COMPAT_XT_ALIGN(target_offset + sizeof(struct compat_xt_standard_target)) != next_offset)
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return -EINVAL;
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/* compat_xt_entry match has less strict aligment requirements,
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/* compat_xt_entry match has less strict alignment requirements,
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* otherwise they are identical. In case of padding differences
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* we need to add compat version of xt_check_entry_match.
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*/
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@ -71,6 +71,7 @@ algoritm||algorithm
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algoritms||algorithms
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algorrithm||algorithm
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algorritm||algorithm
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aligment||alignment
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allign||align
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allocatrd||allocated
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allocte||allocate
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