forked from luck/tmp_suning_uos_patched
usb: gadget: udc: net2280: Improve patching of defect 7374
Once the defect 7374 is patched, there is no reason the keep reading the idx scratch register. Cache the content of the scratch idx register on device flag. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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485f44d06b
commit
5517525e05
@ -1765,76 +1765,73 @@ static void defect7374_disable_data_eps(struct net2280 *dev)
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static void defect7374_enable_data_eps_zero(struct net2280 *dev)
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{
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u32 tmp = 0, tmp_reg;
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u32 fsmvalue, scratch;
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u32 scratch;
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int i;
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unsigned char ep_sel;
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scratch = get_idx_reg(dev->regs, SCRATCH);
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fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
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WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
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== DEFECT7374_FSM_SS_CONTROL_READ);
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scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
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/*See if firmware needs to set up for workaround*/
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if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ) {
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ep_warn(dev, "Operate Defect 7374 workaround soft this time");
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ep_warn(dev, "It will operate on cold-reboot and SS connect");
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ep_warn(dev, "Operate Defect 7374 workaround soft this time");
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ep_warn(dev, "It will operate on cold-reboot and SS connect");
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/*GPEPs:*/
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tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
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(2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
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((dev->enhanced_mode) ?
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BIT(OUT_ENDPOINT_ENABLE) : BIT(ENDPOINT_ENABLE)) |
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BIT(IN_ENDPOINT_ENABLE));
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/*GPEPs:*/
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tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
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(2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
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((dev->enhanced_mode) ?
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BIT(OUT_ENDPOINT_ENABLE) : BIT(ENDPOINT_ENABLE)) |
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BIT(IN_ENDPOINT_ENABLE));
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for (i = 1; i < 5; i++)
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writel(tmp, &dev->ep[i].cfg->ep_cfg);
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for (i = 1; i < 5; i++)
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writel(tmp, &dev->ep[i].cfg->ep_cfg);
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/* CSRIN, PCIIN, STATIN, RCIN*/
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tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
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writel(tmp, &dev->dep[1].dep_cfg);
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writel(tmp, &dev->dep[3].dep_cfg);
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writel(tmp, &dev->dep[4].dep_cfg);
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writel(tmp, &dev->dep[5].dep_cfg);
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/* CSRIN, PCIIN, STATIN, RCIN*/
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tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
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writel(tmp, &dev->dep[1].dep_cfg);
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writel(tmp, &dev->dep[3].dep_cfg);
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writel(tmp, &dev->dep[4].dep_cfg);
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writel(tmp, &dev->dep[5].dep_cfg);
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/*Implemented for development and debug.
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* Can be refined/tuned later.*/
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for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
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/* Select an endpoint for subsequent operations: */
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tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
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writel(((tmp_reg & ~0x1f) | ep_sel),
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&dev->plregs->pl_ep_ctrl);
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/*Implemented for development and debug.
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* Can be refined/tuned later.*/
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for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
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/* Select an endpoint for subsequent operations: */
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tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
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writel(((tmp_reg & ~0x1f) | ep_sel),
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&dev->plregs->pl_ep_ctrl);
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if (ep_sel == 1) {
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tmp =
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(readl(&dev->plregs->pl_ep_ctrl) |
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BIT(CLEAR_ACK_ERROR_CODE) | 0);
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writel(tmp, &dev->plregs->pl_ep_ctrl);
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continue;
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}
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if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
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ep_sel == 18 || ep_sel == 20)
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continue;
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tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
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BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
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writel(tmp, &dev->plregs->pl_ep_cfg_4);
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tmp = readl(&dev->plregs->pl_ep_ctrl) &
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~BIT(EP_INITIALIZED);
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if (ep_sel == 1) {
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tmp =
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(readl(&dev->plregs->pl_ep_ctrl) |
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BIT(CLEAR_ACK_ERROR_CODE) | 0);
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writel(tmp, &dev->plregs->pl_ep_ctrl);
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continue;
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}
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/* Set FSM to focus on the first Control Read:
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* - Tip: Connection speed is known upon the first
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* setup request.*/
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scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
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set_idx_reg(dev->regs, SCRATCH, scratch);
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if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
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ep_sel == 18 || ep_sel == 20)
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continue;
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tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
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BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
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writel(tmp, &dev->plregs->pl_ep_cfg_4);
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tmp = readl(&dev->plregs->pl_ep_ctrl) &
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~BIT(EP_INITIALIZED);
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writel(tmp, &dev->plregs->pl_ep_ctrl);
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} else{
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ep_warn(dev, "Defect 7374 workaround soft will NOT operate");
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ep_warn(dev, "It will operate on cold-reboot and SS connect");
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}
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/* Set FSM to focus on the first Control Read:
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* - Tip: Connection speed is known upon the first
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* setup request.*/
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scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
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set_idx_reg(dev->regs, SCRATCH, scratch);
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}
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/* keeping it simple:
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@ -1885,21 +1882,13 @@ static void usb_reset_228x(struct net2280 *dev)
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static void usb_reset_338x(struct net2280 *dev)
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{
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u32 tmp;
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u32 fsmvalue;
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dev->gadget.speed = USB_SPEED_UNKNOWN;
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(void)readl(&dev->usb->usbctl);
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net2280_led_init(dev);
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fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
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(0xf << DEFECT7374_FSM_FIELD);
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/* See if firmware needs to set up for workaround: */
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if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ) {
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ep_info(dev, "%s: Defect 7374 FsmValue 0x%08x\n", __func__,
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fsmvalue);
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} else {
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if (dev->bug7734_patched) {
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/* disable automatic responses, and irqs */
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writel(0, &dev->usb->stdrsp);
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writel(0, &dev->regs->pciirqenb0);
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@ -1916,7 +1905,7 @@ static void usb_reset_338x(struct net2280 *dev)
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writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
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if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
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if (dev->bug7734_patched) {
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/* reset, and enable pci */
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tmp = readl(&dev->regs->devinit) |
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BIT(PCI_ENABLE) |
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@ -1982,7 +1971,6 @@ static void usb_reinit_338x(struct net2280 *dev)
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{
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int i;
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u32 tmp, val;
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u32 fsmvalue;
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static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
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static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
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0x00, 0xC0, 0x00, 0xC0 };
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@ -2020,14 +2008,7 @@ static void usb_reinit_338x(struct net2280 *dev)
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dev->ep[0].stopped = 0;
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/* Link layer set up */
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fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
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(0xf << DEFECT7374_FSM_FIELD);
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/* See if driver needs to set up for workaround: */
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if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ)
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ep_info(dev, "%s: Defect 7374 FsmValue %08x\n",
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__func__, fsmvalue);
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else {
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if (dev->bug7734_patched) {
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tmp = readl(&dev->usb_ext->usbctl2) &
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~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
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writel(tmp, &dev->usb_ext->usbctl2);
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@ -2134,15 +2115,8 @@ static void ep0_start_228x(struct net2280 *dev)
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static void ep0_start_338x(struct net2280 *dev)
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{
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u32 fsmvalue;
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fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
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(0xf << DEFECT7374_FSM_FIELD);
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if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ)
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ep_info(dev, "%s: Defect 7374 FsmValue %08x\n", __func__,
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fsmvalue);
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else
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if (dev->bug7734_patched)
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writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
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BIT(SET_EP_HIDE_STATUS_PHASE),
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&dev->epregs[0].ep_rsp);
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@ -2230,7 +2204,7 @@ static int net2280_start(struct usb_gadget *_gadget,
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*/
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net2280_led_active(dev, 1);
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if (dev->quirks & PLX_SUPERSPEED)
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if ((dev->quirks & PLX_SUPERSPEED) && !dev->bug7734_patched)
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defect7374_enable_data_eps_zero(dev);
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ep0_start(dev);
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@ -2552,6 +2526,7 @@ static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
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* run after the next USB connection.
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*/
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scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
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dev->bug7734_patched = 1;
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goto restore_data_eps;
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}
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@ -2565,6 +2540,7 @@ static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
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if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
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(state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
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scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
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dev->bug7734_patched = 1;
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break;
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}
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@ -2904,7 +2880,7 @@ static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
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cpu_to_le32s(&u.raw[0]);
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cpu_to_le32s(&u.raw[1]);
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if (dev->quirks & PLX_SUPERSPEED)
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if ((dev->quirks & PLX_SUPERSPEED) && !dev->bug7734_patched)
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defect7374_workaround(dev, u.r);
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tmp = 0;
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@ -3418,9 +3394,12 @@ static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
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(0xf << DEFECT7374_FSM_FIELD);
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/* See if firmware needs to set up for workaround: */
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if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ)
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if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
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dev->bug7734_patched = 1;
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writel(0, &dev->usb->usbctl);
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} else{
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} else
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dev->bug7734_patched = 0;
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} else {
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dev->enhanced_mode = 0;
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dev->n_ep = 7;
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/* put into initial config, link up all endpoints */
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@ -165,7 +165,8 @@ struct net2280 {
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ltm_enable:1,
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wakeup_enable:1,
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selfpowered:1,
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addressed_state:1;
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addressed_state:1,
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bug7734_patched:1;
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u16 chiprev;
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int enhanced_mode;
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int n_ep;
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