forked from luck/tmp_suning_uos_patched
Reset controller fixes for v4.18
This tag fixes reset assertion on i.MX7 for all non-inverted reset control bits. Currently only PCIE controller and PHY resets are used. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCW2ggRhcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwJNcAQClbyh5qNWEXV+aXchxctTyGG2T 8iaXKC860TsnXqwRFAD7BWs50KXwnpkwjOB6nju2OLmqWchzSVjc2nFuD7wCzwo= =0VCE -----END PGP SIGNATURE----- Merge tag 'reset-fixes-for-4.18' of git://git.pengutronix.de/git/pza/linux into next/late Reset controller fixes for v4.18 This tag fixes reset assertion on i.MX7 for all non-inverted reset control bits. Currently only PCIE controller and PHY resets are used. * tag 'reset-fixes-for-4.18' of git://git.pengutronix.de/git/pza/linux: reset: imx7: Fix always writing bits as 0 Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
5920cce856
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@ -80,7 +80,7 @@ static int imx7_reset_set(struct reset_controller_dev *rcdev,
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{
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struct imx7_src *imx7src = to_imx7_src(rcdev);
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const struct imx7_src_signal *signal = &imx7_src_signals[id];
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unsigned int value = 0;
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unsigned int value = assert ? signal->bit : 0;
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switch (id) {
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case IMX7_RESET_PCIEPHY:
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