forked from luck/tmp_suning_uos_patched
OMAP3: control/PM: move padconf save code to mach-omap2/control.c
Move the padconf save code from pm34xx.c to the System Control Module code in mach-omap2/control.c. This is part of the general push to move direct register access from middle-layer core code to low-level core code, so the middle-layer code can be abstracted to work on multiple platforms and cleaned up. In the medium-to-long term, this code should be called by the mux layer code, not the PM idle code. This is because, according to the TRM, saving the padconf only needs to be done when the padconf changes[1]. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> 1. OMAP34xx Multimedia Device Silicon Revision 3.1.x [Rev. ZH] [SWPU222H] Section 4.11.4 "Device Off-Mode Sequences"
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@ -26,6 +26,10 @@
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#include "pm.h"
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#include "pm.h"
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#include "control.h"
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#include "control.h"
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/* Used by omap3_ctrl_save_padconf() */
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#define START_PADCONF_SAVE 0x2
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#define PADCONF_SAVE_DONE 0x1
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static void __iomem *omap2_ctrl_base;
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static void __iomem *omap2_ctrl_base;
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static void __iomem *omap4_ctrl_pad_base;
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static void __iomem *omap4_ctrl_pad_base;
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@ -530,4 +534,31 @@ void omap3630_ctrl_disable_rta(void)
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omap_ctrl_writel(OMAP36XX_RTA_DISABLE, OMAP36XX_CONTROL_MEM_RTA_CTRL);
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omap_ctrl_writel(OMAP36XX_RTA_DISABLE, OMAP36XX_CONTROL_MEM_RTA_CTRL);
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}
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}
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/**
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* omap3_ctrl_save_padconf - save padconf registers to scratchpad RAM
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*
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* Tell the SCM to start saving the padconf registers, then wait for
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* the process to complete. Returns 0 unconditionally, although it
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* should also eventually be able to return -ETIMEDOUT, if the save
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* does not complete.
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*
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* XXX This function is missing a timeout. What should it be?
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*/
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int omap3_ctrl_save_padconf(void)
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{
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u32 cpo;
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/* Save the padconf registers */
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cpo = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
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cpo |= START_PADCONF_SAVE;
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omap_ctrl_writel(cpo, OMAP343X_CONTROL_PADCONF_OFF);
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/* wait for the save to complete */
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while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
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& PADCONF_SAVE_DONE))
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udelay(1);
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return 0;
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}
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#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
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#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
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@ -359,6 +359,7 @@ extern void omap3_control_save_context(void);
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extern void omap3_control_restore_context(void);
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extern void omap3_control_restore_context(void);
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extern void omap3_ctrl_write_boot_mode(u8 bootmode);
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extern void omap3_ctrl_write_boot_mode(u8 bootmode);
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extern void omap3630_ctrl_disable_rta(void);
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extern void omap3630_ctrl_disable_rta(void);
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extern int omap3_ctrl_save_padconf(void);
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#else
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#else
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#define omap_ctrl_base_get() 0
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#define omap_ctrl_base_get() 0
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#define omap_ctrl_readb(x) 0
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#define omap_ctrl_readb(x) 0
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@ -133,16 +133,7 @@ static void omap3_disable_io_chain(void)
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static void omap3_core_save_context(void)
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static void omap3_core_save_context(void)
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{
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{
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u32 control_padconf_off;
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omap3_ctrl_save_padconf();
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/* Save the padconf registers */
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control_padconf_off = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
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control_padconf_off |= START_PADCONF_SAVE;
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omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
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/* wait for the save to complete */
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while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
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& PADCONF_SAVE_DONE))
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udelay(1);
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/*
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/*
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* Force write last pad into memory, as this can fail in some
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* Force write last pad into memory, as this can fail in some
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@ -32,9 +32,6 @@ void omap_prcm_arch_reset(char mode, const char *cmd);
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int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
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int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
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const char *name);
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const char *name);
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#define START_PADCONF_SAVE 0x2
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#define PADCONF_SAVE_DONE 0x1
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#endif
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#endif
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