forked from luck/tmp_suning_uos_patched
powerpc: Context switch more PMU related SPRs
In commit 9353374
"Context switch the new EBB SPRs" we added support for
context switching some new EBB SPRs. However despite four of us signing
off on that patch we missed some. To be fair these are not actually new
SPRs, but they are now potentially user accessible so need to be context
switched.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
parent
605e44d6e6
commit
59affcd3e4
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@ -284,6 +284,12 @@ struct thread_struct {
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unsigned long ebbrr;
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unsigned long ebbhr;
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unsigned long bescr;
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unsigned long siar;
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unsigned long sdar;
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unsigned long sier;
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unsigned long mmcr0;
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unsigned long mmcr2;
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unsigned long mmcra;
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#endif
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};
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@ -127,6 +127,12 @@ int main(void)
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DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));
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DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));
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DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));
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DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar));
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DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar));
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DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
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DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
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DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
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DEFINE(THREAD_MMCRA, offsetof(struct thread_struct, mmcra));
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#endif
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
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@ -465,6 +465,20 @@ BEGIN_FTR_SECTION
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std r0, THREAD_EBBHR(r3)
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mfspr r0, SPRN_EBBRR
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std r0, THREAD_EBBRR(r3)
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/* PMU registers made user read/(write) by EBB */
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mfspr r0, SPRN_SIAR
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std r0, THREAD_SIAR(r3)
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mfspr r0, SPRN_SDAR
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std r0, THREAD_SDAR(r3)
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mfspr r0, SPRN_SIER
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std r0, THREAD_SIER(r3)
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mfspr r0, SPRN_MMCR0
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std r0, THREAD_MMCR0(r3)
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mfspr r0, SPRN_MMCR2
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std r0, THREAD_MMCR2(r3)
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mfspr r0, SPRN_MMCRA
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std r0, THREAD_MMCRA(r3)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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#endif
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@ -560,6 +574,20 @@ BEGIN_FTR_SECTION
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ld r0, THREAD_EBBRR(r4)
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mtspr SPRN_EBBRR, r0
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/* PMU registers made user read/(write) by EBB */
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ld r0, THREAD_SIAR(r4)
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mtspr SPRN_SIAR, r0
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ld r0, THREAD_SDAR(r4)
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mtspr SPRN_SDAR, r0
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ld r0, THREAD_SIER(r4)
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mtspr SPRN_SIER, r0
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ld r0, THREAD_MMCR0(r4)
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mtspr SPRN_MMCR0, r0
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ld r0, THREAD_MMCR2(r4)
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mtspr SPRN_MMCR2, r0
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ld r0, THREAD_MMCRA(r4)
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mtspr SPRN_MMCRA, r0
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ld r0,THREAD_TAR(r4)
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mtspr SPRN_TAR,r0
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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