forked from luck/tmp_suning_uos_patched
davinci: Correct the number of GPIO pins for da850/omap-l138
DA850/OMAP-L138 has 144 pins configurable as GPIO, but currently this has been configured as 128. This patch corrects it. Also, this patch adds the base address for GPIO pins greater than 128. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -623,7 +623,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
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.intc_irq_num = DA850_N_CP_INTC_IRQ,
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.timer_info = &da850_timer_info,
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.gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE),
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.gpio_num = 128,
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.gpio_num = 144,
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.gpio_irq = IRQ_DA8XX_GPIO0,
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.serial_dev = &da8xx_serial_device,
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.emac_pdata = &da8xx_emac_pdata,
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@ -78,6 +78,8 @@ __gpio_to_controller(unsigned gpio)
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ptr = base + 0x60;
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else if (gpio < 32 * 4)
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ptr = base + 0x88;
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else if (gpio < 32 * 5)
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ptr = base + 0xb0;
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else
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ptr = NULL;
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return ptr;
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@ -397,8 +397,8 @@
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#define DA850_N_CP_INTC_IRQ 101
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/* da830/da850 currently has the most gpio pins (128) */
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#define DAVINCI_N_GPIO 128
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/* da850 currently has the most gpio pins (144) */
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#define DAVINCI_N_GPIO 144
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/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
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#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
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