forked from luck/tmp_suning_uos_patched
[PATCH] sky2: explicit set power state
Add better power management, and power down the chip on device removal Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
shemminger@osdl.org
Jeff Garzik
parent
d1f1370863
commit
5afa0a9cfb
@ -175,6 +175,91 @@ static u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
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return gma_read16(hw, port, GM_SMI_DATA);
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}
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static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
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{
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u16 power_control;
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u32 reg1;
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int vaux;
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int ret = 0;
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pr_debug("sky2_set_power_state %d\n", state);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_PMC, &power_control);
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vaux = (sky2_read8(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
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(power_control & PCI_PM_CAP_PME_D3cold);
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pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_CTRL, &power_control);
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power_control |= PCI_PM_CTRL_PME_STATUS;
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power_control &= ~(PCI_PM_CTRL_STATE_MASK);
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switch (state) {
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case PCI_D0:
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/* switch power to VCC (WA for VAUX problem) */
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sky2_write8(hw, B0_POWER_CTRL,
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PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
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/* disable Core Clock Division, */
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sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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/* enable bits are inverted */
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sky2_write8(hw, B2_Y2_CLK_GATE,
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Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
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Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
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Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
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else
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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/* Turn off phy power saving */
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pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1);
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reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
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/* looks like this xl is back asswards .. */
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) {
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reg1 |= PCI_Y2_PHY1_COMA;
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if (hw->ports > 1)
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reg1 |= PCI_Y2_PHY2_COMA;
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}
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pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
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break;
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case PCI_D3hot:
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case PCI_D3cold:
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/* Turn on phy power saving */
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pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1);
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
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else
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reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
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pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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else
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/* enable bits are inverted */
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sky2_write8(hw, B2_Y2_CLK_GATE,
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Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
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Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
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Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
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/* switch power to VAUX */
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if (vaux && state != PCI_D3cold)
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sky2_write8(hw, B0_POWER_CTRL,
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(PC_VAUX_ENA | PC_VCC_ENA |
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PC_VAUX_ON | PC_VCC_OFF));
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break;
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default:
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printk(KERN_ERR PFX "Unknown power state %d\n", state);
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ret = -1;
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}
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pci_write_config_byte(hw->pdev, hw->pm_cap + PCI_PM_CTRL, power_control);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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return ret;
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}
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static void sky2_phy_reset(struct sky2_hw *hw, unsigned port)
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{
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u16 reg;
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@ -1869,7 +1954,7 @@ static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
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static int sky2_reset(struct sky2_hw *hw)
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{
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u32 ctst, power;
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u32 ctst;
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u16 status;
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u8 t8, pmd_type;
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int i;
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@ -1927,33 +2012,7 @@ static int sky2_reset(struct sky2_hw *hw)
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}
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hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
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/* switch power to VCC (WA for VAUX problem) */
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sky2_write8(hw, B0_POWER_CTRL,
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PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
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/* disable Core Clock Division, */
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sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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/* enable bits are inverted */
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sky2_write8(hw, B2_Y2_CLK_GATE,
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Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
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Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
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Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
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else
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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/* Turn off phy power saving */
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pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &power);
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power &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
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/* looks like this xl is back asswards .. */
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if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) {
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power |= PCI_Y2_PHY1_COMA;
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if (hw->ports > 1)
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power |= PCI_Y2_PHY2_COMA;
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}
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pci_write_config_dword(hw->pdev, PCI_DEV_REG1, power);
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sky2_set_power_state(hw, PCI_D0);
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for (i = 0; i < hw->ports; i++) {
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sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
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@ -2714,7 +2773,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
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{
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struct net_device *dev, *dev1 = NULL;
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struct sky2_hw *hw;
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int err, using_dac = 0;
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int err, pm_cap, using_dac = 0;
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err = pci_enable_device(pdev);
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if (err) {
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@ -2732,6 +2791,15 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
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pci_set_master(pdev);
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/* Find power-management capability. */
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pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
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if (pm_cap == 0) {
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printk(KERN_ERR PFX "Cannot find PowerManagement capability, "
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"aborting.\n");
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err = -EIO;
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goto err_out_free_regions;
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}
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if (sizeof(dma_addr_t) > sizeof(u32)) {
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err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
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if (!err)
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@ -2775,6 +2843,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
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pci_name(pdev));
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goto err_out_free_hw;
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}
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hw->pm_cap = pm_cap;
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err = sky2_reset(hw);
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if (err)
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@ -2861,8 +2930,10 @@ static void __devexit sky2_remove(struct pci_dev *pdev)
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unregister_netdev(dev0);
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sky2_write32(hw, B0_IMSK, 0);
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sky2_set_power_state(hw, PCI_D3hot);
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sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
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sky2_write8(hw, B0_CTST, CS_RST_SET);
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sky2_read8(hw, B0_CTST);
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free_irq(pdev->irq, hw);
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pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
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@ -2874,6 +2945,7 @@ static void __devexit sky2_remove(struct pci_dev *pdev)
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free_netdev(dev0);
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iounmap(hw->regs);
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kfree(hw);
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pci_set_drvdata(pdev, NULL);
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}
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@ -2881,28 +2953,21 @@ static void __devexit sky2_remove(struct pci_dev *pdev)
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static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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struct sky2_hw *hw = pci_get_drvdata(pdev);
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int i, wol = 0;
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int i;
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for (i = 0; i < 2; i++) {
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struct net_device *dev = hw->dev[i];
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if (dev) {
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struct sky2_port *sky2 = netdev_priv(dev);
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if (netif_running(dev)) {
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netif_carrier_off(dev);
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sky2_down(dev);
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}
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if (!netif_running(dev))
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continue;
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sky2_down(dev);
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netif_device_detach(dev);
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wol |= sky2->wol;
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}
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}
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pci_save_state(pdev);
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pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
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pci_disable_device(pdev);
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pci_set_power_state(pdev, pci_choose_state(pdev, state));
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return 0;
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return sky2_set_power_state(hw, pci_choose_state(pdev, state));
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}
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static int sky2_resume(struct pci_dev *pdev)
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@ -2910,18 +2975,19 @@ static int sky2_resume(struct pci_dev *pdev)
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struct sky2_hw *hw = pci_get_drvdata(pdev);
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int i;
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pci_set_power_state(pdev, PCI_D0);
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pci_restore_state(pdev);
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pci_enable_wake(pdev, PCI_D0, 0);
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sky2_set_power_state(hw, PCI_D0);
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sky2_reset(hw);
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for (i = 0; i < 2; i++) {
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struct net_device *dev = hw->dev[i];
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if (dev) {
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netif_device_attach(dev);
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if (netif_running(dev))
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if (netif_running(dev)) {
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netif_device_attach(dev);
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sky2_up(dev);
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}
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}
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}
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return 0;
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@ -1854,6 +1854,7 @@ struct sky2_hw {
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u32 intr_mask;
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struct net_device *dev[2];
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int pm_cap;
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u8 chip_id;
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u8 chip_rev;
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u8 copper;
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