forked from luck/tmp_suning_uos_patched
x86, amd_nb: Enable GART support for AMD family 0x15 CPUs
AMD CPU family 0x15 still supports GART for compatibility reasons. Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> LKML-Reference: <20100930124316.GG20545@loge.amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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@ -15,6 +15,7 @@ static u32 *flush_words;
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struct pci_device_id k8_nb_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_MISC) },
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{}
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};
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EXPORT_SYMBOL(k8_nb_ids);
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@ -45,7 +46,8 @@ int cache_k8_northbridges(void)
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k8_northbridges.num++;
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/* some CPU families (e.g. family 0x11) do not support GART */
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if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10)
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if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
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boot_cpu_data.x86 == 0x15)
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k8_northbridges.gart_supported = 1;
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k8_northbridges.nb_misc = kmalloc((k8_northbridges.num + 1) *
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@ -514,6 +514,7 @@
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#define PCI_DEVICE_ID_AMD_11H_NB_DRAM 0x1302
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#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303
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#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304
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#define PCI_DEVICE_ID_AMD_15H_NB_MISC 0x1603
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#define PCI_DEVICE_ID_AMD_LANCE 0x2000
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#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
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#define PCI_DEVICE_ID_AMD_SCSI 0x2020
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