forked from luck/tmp_suning_uos_patched
[POWERPC] Allow MPC8641 HPCN to build with CONFIG_PCI disabled too.
Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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054389f114
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5dc599c206
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@ -52,6 +52,7 @@ unsigned long pci_dram_offset = 0;
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#endif
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#ifdef CONFIG_PCI
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static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
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struct pt_regs *regs)
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{
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@ -60,14 +61,18 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
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generic_handle_irq(cascade_irq, regs);
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desc->chip->eoi(irq);
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}
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#endif /* CONFIG_PCI */
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void __init
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mpc86xx_hpcn_init_irq(void)
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{
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struct mpic *mpic1;
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struct device_node *np, *cascade_node = NULL;
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int cascade_irq;
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struct device_node *np;
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phys_addr_t openpic_paddr;
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#ifdef CONFIG_PCI
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struct device_node *cascade_node = NULL;
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int cascade_irq;
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#endif
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL)
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@ -188,7 +188,8 @@ int __init add_bridge(struct device_node *dev)
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printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. "
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"Firmware bus number: %d->%d\n",
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rsrc.start, hose->first_busno, hose->last_busno);
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(unsigned long) rsrc.start,
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hose->first_busno, hose->last_busno);
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DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
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hose, hose->cfg_addr, hose->cfg_data);
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@ -23,8 +23,6 @@
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#define _ISA_MEM_BASE isa_mem_base
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#ifdef CONFIG_PCI
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#define PCI_DRAM_OFFSET pci_dram_offset
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#else
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#define PCI_DRAM_OFFSET 0
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#endif
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#define CPU0_BOOT_RELEASE 0x01000000
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