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ARM: OMAP: Make plat/sram.h local to plat-omap

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We can move this from plat to be local to plat-omap
for common ARM zImage support.

Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2012-10-02 14:19:52 -07:00
parent a8f7445c7b
commit 622297fdec
18 changed files with 131 additions and 126 deletions
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3
arch/arm/mach-omap1/clock.c
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@ -24,11 +24,12 @@
#include <plat/cpu.h>
#include <plat/usb.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/clkdev_omap.h>
#include <mach/hardware.h>
#include "../plat-omap/sram.h"
#include "iomap.h"
#include "clock.h"
#include "opp.h"

3
arch/arm/mach-omap1/clock_data.c
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@ -25,11 +25,12 @@
#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/clkdev_omap.h>
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
#include <mach/hardware.h>
#include <mach/usb.h> /* for OTG_BASE */
#include "../plat-omap/sram.h"
#include "iomap.h"
#include "clock.h"

2
arch/arm/mach-omap1/devices.c
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@ -26,6 +26,8 @@
#include <mach/camera.h>
#include <mach/hardware.h>
#include "../plat-omap/sram.h"
#include "common.h"
#include "clock.h"
#include "dma.h"

3
arch/arm/mach-omap1/pm.c
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@ -51,7 +51,6 @@
#include <plat/cpu.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <mach/tc.h>
#include <mach/mux.h>
#include <plat-omap/dma-omap.h>
@ -59,6 +58,8 @@
#include <mach/irqs.h>
#include "../plat-omap/sram.h"
#include "iomap.h"
#include "pm.h"

3
arch/arm/mach-omap2/clkt2xxx_dpllcore.c
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@ -26,7 +26,8 @@
#include <linux/io.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include "../plat-omap/sram.h"
#include "clock.h"
#include "clock2xxx.h"

3
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
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@ -34,7 +34,8 @@
#include <linux/slab.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include "../plat-omap/sram.h"
#include "soc.h"
#include "clock.h"

3
arch/arm/mach-omap2/clkt34xx_dpll3m2.c
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@ -22,7 +22,8 @@
#include <linux/io.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include "../plat-omap/sram.h"
#include "clock.h"
#include "clock3xxx.h"

3
arch/arm/mach-omap2/io.c
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@ -25,13 +25,14 @@
#include <asm/tlb.h>
#include <asm/mach/map.h>
#include <plat/sram.h>
#include <plat/serial.h>
#include <plat/omap-pm.h>
#include <plat/omap_hwmod.h>
#include <plat/multi.h>
#include <plat-omap/dma-omap.h>
#include "../plat-omap/sram.h"
#include "soc.h"
#include "iomap.h"
#include "voltage.h"

4
arch/arm/mach-omap2/omap4-common.c
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@ -25,11 +25,11 @@
#include <asm/mach/map.h>
#include <asm/memblock.h>
#include <plat/sram.h>
#include <plat/omap-secure.h>
#include "omap-wakeupgen.h"
#include "../plat-omap/sram.h"
#include "omap-wakeupgen.h"
#include "soc.h"
#include "common.h"
#include "mmc.h"

3
arch/arm/mach-omap2/pm24xx.c
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@ -37,9 +37,10 @@
#include <asm/system_misc.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat-omap/dma-omap.h>
#include "../plat-omap/sram.h"
#include "common.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"

3
arch/arm/mach-omap2/pm34xx.c
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@ -35,12 +35,13 @@
#include <asm/suspend.h>
#include <asm/system_misc.h>
#include <plat/sram.h>
#include "clockdomain.h"
#include "powerdomain.h"
#include <plat/prcm.h>
#include <plat-omap/dma-omap.h>
#include "../plat-omap/sram.h"
#include "common.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"

2
arch/arm/mach-omap2/sdrc.c
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@ -25,7 +25,7 @@
#include "common.h"
#include <plat/clock.h>
#include <plat/sram.h>
#include "../plat-omap/sram.h"
#include "sdrc.h"

3
arch/arm/mach-omap2/sdrc2xxx.c
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@ -25,7 +25,8 @@
#include <linux/io.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include "../plat-omap/sram.h"
#include "soc.h"
#include "iomap.h"

2
arch/arm/mach-omap2/sleep34xx.S
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@ -26,7 +26,7 @@
#include <asm/assembler.h>
#include <plat/sram.h>
#include "../plat-omap/sram.h"
#include "omap34xx.h"
#include "iomap.h"

2
arch/arm/plat-omap/common.h
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@ -33,6 +33,4 @@ extern void omap_reserve(void);
struct omap_hwmod;
extern int omap_dss_reset(struct omap_hwmod *);
void omap_sram_init(void);
#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */

105
arch/arm/plat-omap/include/plat/sram.h
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@ -1,105 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/sram.h
*
* Interface for functions that need to be run in internal SRAM
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_OMAP_SRAM_H
#define __ARCH_ARM_OMAP_SRAM_H
#ifndef __ASSEMBLY__
#include <asm/fncpy.h>
extern void *omap_sram_push_address(unsigned long size);
/* Macro to push a function to the internal SRAM, using the fncpy API */
#define omap_sram_push(funcp, size) ({ \
typeof(&(funcp)) _res = NULL; \
void *_sram_address = omap_sram_push_address(size); \
if (_sram_address) \
_res = fncpy(_sram_address, &(funcp), size); \
_res; \
})
extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
u32 mem_type);
extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
extern u32 omap3_configure_core_dpll(
u32 m2, u32 unlock_dll, u32 f, u32 inc,
u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
extern void omap3_sram_restore_context(void);
/* Do not use these */
extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long omap1_sram_reprogram_clock_sz;
extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long omap24xx_sram_reprogram_clock_sz;
extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern unsigned long omap242x_sram_ddr_init_sz;
extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
int bypass);
extern unsigned long omap242x_sram_set_prcm_sz;
extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
u32 mem_type);
extern unsigned long omap242x_sram_reprogram_sdrc_sz;
extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern unsigned long omap243x_sram_ddr_init_sz;
extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
int bypass);
extern unsigned long omap243x_sram_set_prcm_sz;
extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
u32 mem_type);
extern unsigned long omap243x_sram_reprogram_sdrc_sz;
extern u32 omap3_sram_configure_core_dpll(
u32 m2, u32 unlock_dll, u32 f, u32 inc,
u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
extern unsigned long omap3_sram_configure_core_dpll_sz;
#ifdef CONFIG_PM
extern void omap_push_sram_idle(void);
#else
static inline void omap_push_sram_idle(void) {}
#endif /* CONFIG_PM */
#endif /* __ASSEMBLY__ */
/*
* OMAP2+: define the SRAM PA addresses.
* Used by the SRAM management code and the idle sleep code.
*/
#define OMAP2_SRAM_PA 0x40200000
#define OMAP3_SRAM_PA 0x40200000
#ifdef CONFIG_OMAP4_ERRATA_I688
#define OMAP4_SRAM_PA 0x40304000
#define OMAP4_SRAM_VA 0xfe404000
#else
#define OMAP4_SRAM_PA 0x40300000
#endif
#define AM33XX_SRAM_PA 0x40300000
#endif

1
arch/arm/plat-omap/sram.c
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@ -25,7 +25,6 @@
#include <asm/mach/map.h>
#include <plat/sram.h>
#include <plat/cpu.h>
#include "sram.h"

109
arch/arm/plat-omap/sram.h
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@ -1,6 +1,107 @@
#ifndef __PLAT_OMAP_SRAM_H__
#define __PLAT_OMAP_SRAM_H__
/*
* arch/arm/plat-omap/include/mach/sram.h
*
* Interface for functions that need to be run in internal SRAM
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
extern int __init omap_sram_init(void);
#ifndef __ARCH_ARM_OMAP_SRAM_H
#define __ARCH_ARM_OMAP_SRAM_H
#endif /* __PLAT_OMAP_SRAM_H__ */
#ifndef __ASSEMBLY__
#include <asm/fncpy.h>
int __init omap_sram_init(void);
extern void *omap_sram_push_address(unsigned long size);
/* Macro to push a function to the internal SRAM, using the fncpy API */
#define omap_sram_push(funcp, size) ({ \
typeof(&(funcp)) _res = NULL; \
void *_sram_address = omap_sram_push_address(size); \
if (_sram_address) \
_res = fncpy(_sram_address, &(funcp), size); \
_res; \
})
extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
u32 mem_type);
extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
extern u32 omap3_configure_core_dpll(
u32 m2, u32 unlock_dll, u32 f, u32 inc,
u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
extern void omap3_sram_restore_context(void);
/* Do not use these */
extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long omap1_sram_reprogram_clock_sz;
extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
extern unsigned long omap24xx_sram_reprogram_clock_sz;
extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern unsigned long omap242x_sram_ddr_init_sz;
extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
int bypass);
extern unsigned long omap242x_sram_set_prcm_sz;
extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
u32 mem_type);
extern unsigned long omap242x_sram_reprogram_sdrc_sz;
extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock);
extern unsigned long omap243x_sram_ddr_init_sz;
extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
int bypass);
extern unsigned long omap243x_sram_set_prcm_sz;
extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
u32 mem_type);
extern unsigned long omap243x_sram_reprogram_sdrc_sz;
extern u32 omap3_sram_configure_core_dpll(
u32 m2, u32 unlock_dll, u32 f, u32 inc,
u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
extern unsigned long omap3_sram_configure_core_dpll_sz;
#ifdef CONFIG_PM
extern void omap_push_sram_idle(void);
#else
static inline void omap_push_sram_idle(void) {}
#endif /* CONFIG_PM */
#endif /* __ASSEMBLY__ */
/*
* OMAP2+: define the SRAM PA addresses.
* Used by the SRAM management code and the idle sleep code.
*/
#define OMAP2_SRAM_PA 0x40200000
#define OMAP3_SRAM_PA 0x40200000
#ifdef CONFIG_OMAP4_ERRATA_I688
#define OMAP4_SRAM_PA 0x40304000
#define OMAP4_SRAM_VA 0xfe404000
#else
#define OMAP4_SRAM_PA 0x40300000
#endif
#define AM33XX_SRAM_PA 0x40300000
#endif