forked from luck/tmp_suning_uos_patched
m68k: apollo, q40, sun3, sun3x: Remove arch_gettimeoffset implementations
These dummy implementations are no better than default_arch_gettimeoffset() so remove them. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
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@ -29,7 +29,6 @@ u_long apollo_model;
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extern void dn_sched_init(irq_handler_t handler);
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extern void dn_init_IRQ(void);
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extern u32 dn_gettimeoffset(void);
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extern int dn_dummy_hwclk(int, struct rtc_time *);
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extern void dn_dummy_reset(void);
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#ifdef CONFIG_HEARTBEAT
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@ -152,7 +151,6 @@ void __init config_apollo(void)
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mach_sched_init=dn_sched_init; /* */
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mach_init_IRQ=dn_init_IRQ;
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arch_gettimeoffset = dn_gettimeoffset;
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mach_max_dma_address = 0xffffffff;
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mach_hwclk = dn_dummy_hwclk; /* */
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mach_reset = dn_dummy_reset; /* */
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@ -205,11 +203,6 @@ void dn_sched_init(irq_handler_t timer_routine)
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pr_err("Couldn't register timer interrupt\n");
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}
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u32 dn_gettimeoffset(void)
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{
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return 0xdeadbeef;
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}
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int dn_dummy_hwclk(int op, struct rtc_time *t) {
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@ -40,7 +40,6 @@ extern void q40_init_IRQ(void);
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static void q40_get_model(char *model);
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extern void q40_sched_init(irq_handler_t handler);
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static u32 q40_gettimeoffset(void);
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static int q40_hwclk(int, struct rtc_time *);
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static unsigned int q40_get_ss(void);
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static int q40_get_rtc_pll(struct rtc_pll_info *pll);
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@ -169,7 +168,6 @@ void __init config_q40(void)
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mach_sched_init = q40_sched_init;
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mach_init_IRQ = q40_init_IRQ;
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arch_gettimeoffset = q40_gettimeoffset;
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mach_hwclk = q40_hwclk;
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mach_get_ss = q40_get_ss;
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mach_get_rtc_pll = q40_get_rtc_pll;
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@ -201,13 +199,6 @@ int __init q40_parse_bootinfo(const struct bi_record *rec)
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return 1;
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}
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static u32 q40_gettimeoffset(void)
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{
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return 5000 * (ql_ticks != 0) * 1000;
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}
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/*
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* Looks like op is non-zero for setting the clock, and zero for
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* reading the clock.
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@ -37,7 +37,6 @@
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char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
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extern u32 sun3_gettimeoffset(void);
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static void sun3_sched_init(irq_handler_t handler);
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extern void sun3_get_model (char* model);
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extern int sun3_hwclk(int set, struct rtc_time *t);
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@ -138,7 +137,6 @@ void __init config_sun3(void)
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mach_sched_init = sun3_sched_init;
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mach_init_IRQ = sun3_init_IRQ;
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mach_reset = sun3_reboot;
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arch_gettimeoffset = sun3_gettimeoffset;
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mach_get_model = sun3_get_model;
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mach_hwclk = sun3_hwclk;
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mach_halt = sun3_halt;
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@ -22,13 +22,6 @@
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#define STOP_VAL (INTERSIL_STOP | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
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#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
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/* does this need to be implemented? */
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u32 sun3_gettimeoffset(void)
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{
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return 1000;
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}
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/* get/set hwclock */
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int sun3_hwclk(int set, struct rtc_time *t)
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@ -49,7 +49,6 @@ void __init config_sun3x(void)
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mach_sched_init = sun3x_sched_init;
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mach_init_IRQ = sun3_init_IRQ;
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arch_gettimeoffset = sun3x_gettimeoffset;
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mach_reset = sun3x_reboot;
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mach_hwclk = sun3x_hwclk;
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@ -73,11 +73,6 @@ int sun3x_hwclk(int set, struct rtc_time *t)
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return 0;
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}
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/* Not much we can do here */
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u32 sun3x_gettimeoffset(void)
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{
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return 0L;
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}
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#if 0
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static irqreturn_t sun3x_timer_tick(int irq, void *dev_id)
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@ -3,7 +3,6 @@
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#define SUN3X_TIME_H
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extern int sun3x_hwclk(int set, struct rtc_time *t);
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u32 sun3x_gettimeoffset(void);
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void sun3x_sched_init(irq_handler_t vector);
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struct mostek_dt {
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