forked from luck/tmp_suning_uos_patched
A bunch of EDAC updates all over the place:
* Support for new AMD models, along with more graceful fallback for unsupported hw. * Bunch of fixes from SUSE accumulated from bug reports * Misc other fixes and cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTMUueAAoJEBLB8Bhh3lVKbGIP/iXBanEUUXbg027hvNch8tbJ Yzsk3VkhmZ6hWXU4XNkvFFbSfCfHuHYQSEAxro6yc2t+6aVhMBrKIcCBNejNYt37 louswtfhC9A4geX206bzfOFNxOVsWzX2vxhhQFbqybZe6BnmcnCSKn//v+kF0/5E 6CrwQyKQjl2vGewPU4pBlrbnRNduPRs6bg6lWgzNxbKrhD8Ce/7NQRVd5v698pNm NTqfS37J90o1DP3I6yY30trtprPjjfnFANxb2DPaf09Z/X+aI1ONNe4s/URBd+qg yYIWAphbKopXPZOS0wDU0ikb7dGWH1lcQdVE69GxnCEvz9hz2ISg3plguwbYLPzK CmI4RGU0D8n5Irxu8bUID4SLT6fSAqU+cgJCdu6dqUncB7khcwG8dWJxMYNGjlBm TD9aCRRs+/b07KUrBeL1tufgd9gGPKWDeecTw55VMofIFkYvwIAz8TFdj3ql4Uz/ AsYJkAqvoO4dTz1ai+PJ06EWSijUT+KLkyZbybS5+PiP4uRAWY8pkCKbvTJQb1xN 0SAwm0tqT7mQKc/oIsvpZ/TLjwYxRhAeVMvrkElkNRPSsrt70rDVQiPgzQh9GTqV d5GmYI65Tk2Jrl7dVN+Pk+NDdS/y52SPk1AMDsfoBP6dndftdF6/gtqnijmbLgMY /yH+hIAKJXJUUKO4pELe =vafk -----END PGP SIGNATURE----- Merge tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp Pull EDAC updates from Borislav Petkov: "A bunch of EDAC updates all over the place: - Support for new AMD models, along with more graceful fallback for unsupported hw. - Bunch of fixes from SUSE accumulated from bug reports - Misc other fixes and cleanups" * tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: amd64_edac: Add support for newer F16h models i7core_edac: Drop unused variable i82875p_edac: Drop redundant call to pci_get_device() amd8111_edac: Fix leaks in probe error paths e752x_edac: Drop pvt->bridge_ck MCE, AMD: Fix decoding module loading on unsupported hw i5100_edac: Remove an unneeded condition in i5100_init_csrows() sb_edac: Degrade log level for device registration amd64_edac: Fix logic to determine channel for F15 M30h processors edac/85xx: Remove deprecated IRQF_DISABLED i3200_edac: Add a missing pci_disable_device() on the exit path i5400_edac: Disable device when unloading module e752x_edac: Simplify call to pci_get_device()
This commit is contained in:
commit
62ff577fa2
@ -22,6 +22,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
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{}
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};
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EXPORT_SYMBOL(amd_nb_misc_ids);
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@ -30,6 +31,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
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{}
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};
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@ -1239,9 +1239,17 @@ static u8 f15_m30h_determine_channel(struct amd64_pvt *pvt, u64 sys_addr,
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if (num_dcts_intlv == 2) {
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select = (sys_addr >> 8) & 0x3;
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channel = select ? 0x3 : 0;
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} else if (num_dcts_intlv == 4)
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channel = (sys_addr >> 8) & 0x7;
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} else if (num_dcts_intlv == 4) {
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u8 intlv_addr = dct_sel_interleave_addr(pvt);
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switch (intlv_addr) {
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case 0x4:
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channel = (sys_addr >> 8) & 0x3;
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break;
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case 0x5:
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channel = (sys_addr >> 9) & 0x3;
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break;
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}
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}
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return channel;
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}
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@ -1799,6 +1807,17 @@ static struct amd64_family_type family_types[] = {
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.read_dct_pci_cfg = f10_read_dct_pci_cfg,
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}
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},
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[F16_M30H_CPUS] = {
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.ctl_name = "F16h_M30h",
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.f1_id = PCI_DEVICE_ID_AMD_16H_M30H_NB_F1,
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.f3_id = PCI_DEVICE_ID_AMD_16H_M30H_NB_F3,
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.ops = {
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.early_channel_count = f1x_early_channel_count,
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.map_sysaddr_to_csrow = f1x_map_sysaddr_to_csrow,
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.dbam_to_cs = f16_dbam_to_chip_select,
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.read_dct_pci_cfg = f10_read_dct_pci_cfg,
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}
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},
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};
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/*
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@ -2578,6 +2597,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
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break;
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case 0x16:
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if (pvt->model == 0x30) {
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fam_type = &family_types[F16_M30H_CPUS];
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pvt->ops = &family_types[F16_M30H_CPUS].ops;
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break;
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}
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fam_type = &family_types[F16_CPUS];
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pvt->ops = &family_types[F16_CPUS].ops;
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break;
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@ -2830,6 +2854,14 @@ static const struct pci_device_id amd64_pci_table[] = {
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.class = 0,
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.class_mask = 0,
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},
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{
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.vendor = PCI_VENDOR_ID_AMD,
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.device = PCI_DEVICE_ID_AMD_16H_M30H_NB_F2,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.class = 0,
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.class_mask = 0,
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},
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{0, }
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};
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@ -168,6 +168,8 @@
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#define PCI_DEVICE_ID_AMD_15H_NB_F2 0x1602
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#define PCI_DEVICE_ID_AMD_16H_NB_F1 0x1531
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#define PCI_DEVICE_ID_AMD_16H_NB_F2 0x1532
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#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F1 0x1581
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#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F2 0x1582
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/*
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* Function 1 - Address Map
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@ -300,6 +302,7 @@ enum amd_families {
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F15_CPUS,
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F15_M30H_CPUS,
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F16_CPUS,
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F16_M30H_CPUS,
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NUM_FAMILIES,
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};
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@ -350,6 +350,7 @@ static int amd8111_dev_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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struct amd8111_dev_info *dev_info = &amd8111_devices[id->driver_data];
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int ret = -ENODEV;
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dev_info->dev = pci_get_device(PCI_VENDOR_ID_AMD,
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dev_info->err_dev, NULL);
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@ -359,16 +360,15 @@ static int amd8111_dev_probe(struct pci_dev *dev,
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"vendor %x, device %x, name %s\n",
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PCI_VENDOR_ID_AMD, dev_info->err_dev,
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dev_info->ctl_name);
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return -ENODEV;
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goto err;
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}
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if (pci_enable_device(dev_info->dev)) {
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pci_dev_put(dev_info->dev);
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printk(KERN_ERR "failed to enable:"
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"vendor %x, device %x, name %s\n",
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PCI_VENDOR_ID_AMD, dev_info->err_dev,
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dev_info->ctl_name);
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return -ENODEV;
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goto err_dev_put;
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}
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/*
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@ -381,8 +381,10 @@ static int amd8111_dev_probe(struct pci_dev *dev,
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edac_device_alloc_ctl_info(0, dev_info->ctl_name, 1,
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NULL, 0, 0,
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NULL, 0, dev_info->edac_idx);
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if (!dev_info->edac_dev)
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return -ENOMEM;
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if (!dev_info->edac_dev) {
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ret = -ENOMEM;
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goto err_dev_put;
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}
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dev_info->edac_dev->pvt_info = dev_info;
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dev_info->edac_dev->dev = &dev_info->dev->dev;
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@ -399,8 +401,7 @@ static int amd8111_dev_probe(struct pci_dev *dev,
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if (edac_device_add_device(dev_info->edac_dev) > 0) {
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printk(KERN_ERR "failed to add edac_dev for %s\n",
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dev_info->ctl_name);
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edac_device_free_ctl_info(dev_info->edac_dev);
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return -ENODEV;
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goto err_edac_free_ctl;
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}
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printk(KERN_INFO "added one edac_dev on AMD8111 "
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@ -409,6 +410,13 @@ static int amd8111_dev_probe(struct pci_dev *dev,
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dev_info->ctl_name);
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return 0;
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err_edac_free_ctl:
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edac_device_free_ctl_info(dev_info->edac_dev);
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err_dev_put:
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pci_dev_put(dev_info->dev);
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err:
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return ret;
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}
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static void amd8111_dev_remove(struct pci_dev *dev)
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@ -437,6 +445,7 @@ static int amd8111_pci_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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struct amd8111_pci_info *pci_info = &amd8111_pcis[id->driver_data];
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int ret = -ENODEV;
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pci_info->dev = pci_get_device(PCI_VENDOR_ID_AMD,
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pci_info->err_dev, NULL);
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@ -446,16 +455,15 @@ static int amd8111_pci_probe(struct pci_dev *dev,
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"vendor %x, device %x, name %s\n",
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PCI_VENDOR_ID_AMD, pci_info->err_dev,
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pci_info->ctl_name);
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return -ENODEV;
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goto err;
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}
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if (pci_enable_device(pci_info->dev)) {
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pci_dev_put(pci_info->dev);
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printk(KERN_ERR "failed to enable:"
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"vendor %x, device %x, name %s\n",
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PCI_VENDOR_ID_AMD, pci_info->err_dev,
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pci_info->ctl_name);
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return -ENODEV;
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goto err_dev_put;
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}
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/*
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@ -465,8 +473,10 @@ static int amd8111_pci_probe(struct pci_dev *dev,
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*/
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pci_info->edac_idx = edac_pci_alloc_index();
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pci_info->edac_dev = edac_pci_alloc_ctl_info(0, pci_info->ctl_name);
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if (!pci_info->edac_dev)
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return -ENOMEM;
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if (!pci_info->edac_dev) {
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ret = -ENOMEM;
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goto err_dev_put;
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}
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pci_info->edac_dev->pvt_info = pci_info;
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pci_info->edac_dev->dev = &pci_info->dev->dev;
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@ -483,8 +493,7 @@ static int amd8111_pci_probe(struct pci_dev *dev,
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if (edac_pci_add_device(pci_info->edac_dev, pci_info->edac_idx) > 0) {
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printk(KERN_ERR "failed to add edac_pci for %s\n",
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pci_info->ctl_name);
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edac_pci_free_ctl_info(pci_info->edac_dev);
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return -ENODEV;
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goto err_edac_free_ctl;
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}
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printk(KERN_INFO "added one edac_pci on AMD8111 "
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@ -493,6 +502,13 @@ static int amd8111_pci_probe(struct pci_dev *dev,
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pci_info->ctl_name);
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return 0;
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err_edac_free_ctl:
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edac_pci_free_ctl_info(pci_info->edac_dev);
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err_dev_put:
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pci_dev_put(pci_info->dev);
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err:
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return ret;
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}
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static void amd8111_pci_remove(struct pci_dev *dev)
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|
@ -209,7 +209,6 @@ enum e752x_chips {
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*/
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struct e752x_pvt {
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struct pci_dev *bridge_ck;
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struct pci_dev *dev_d0f0;
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struct pci_dev *dev_d0f1;
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u32 tolm;
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@ -891,7 +890,7 @@ static void e752x_get_error_info(struct mem_ctl_info *mci,
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info->buf_ferr);
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if (info->dram_ferr)
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pci_write_bits16(pvt->bridge_ck, E752X_DRAM_FERR,
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pci_write_bits16(pvt->dev_d0f1, E752X_DRAM_FERR,
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info->dram_ferr, info->dram_ferr);
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pci_write_config_dword(dev, E752X_FERR_GLOBAL,
|
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@ -936,7 +935,7 @@ static void e752x_get_error_info(struct mem_ctl_info *mci,
|
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info->buf_nerr);
|
||||
|
||||
if (info->dram_nerr)
|
||||
pci_write_bits16(pvt->bridge_ck, E752X_DRAM_NERR,
|
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pci_write_bits16(pvt->dev_d0f1, E752X_DRAM_NERR,
|
||||
info->dram_nerr, info->dram_nerr);
|
||||
|
||||
pci_write_config_dword(dev, E752X_NERR_GLOBAL,
|
||||
@ -1177,38 +1176,33 @@ static void e752x_init_mem_map_table(struct pci_dev *pdev,
|
||||
static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
|
||||
struct e752x_pvt *pvt)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
pvt->dev_d0f1 = pci_get_device(PCI_VENDOR_ID_INTEL,
|
||||
pvt->dev_info->err_dev, NULL);
|
||||
|
||||
pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
|
||||
pvt->dev_info->err_dev, pvt->bridge_ck);
|
||||
|
||||
if (pvt->bridge_ck == NULL) {
|
||||
pvt->bridge_ck = pci_scan_single_device(pdev->bus,
|
||||
if (pvt->dev_d0f1 == NULL) {
|
||||
pvt->dev_d0f1 = pci_scan_single_device(pdev->bus,
|
||||
PCI_DEVFN(0, 1));
|
||||
pci_dev_get(pvt->bridge_ck);
|
||||
pci_dev_get(pvt->dev_d0f1);
|
||||
}
|
||||
|
||||
if (pvt->bridge_ck == NULL) {
|
||||
if (pvt->dev_d0f1 == NULL) {
|
||||
e752x_printk(KERN_ERR, "error reporting device not found:"
|
||||
"vendor %x device 0x%x (broken BIOS?)\n",
|
||||
PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
|
||||
return 1;
|
||||
}
|
||||
|
||||
dev = pci_get_device(PCI_VENDOR_ID_INTEL,
|
||||
pvt->dev_d0f0 = pci_get_device(PCI_VENDOR_ID_INTEL,
|
||||
e752x_devs[dev_idx].ctl_dev,
|
||||
NULL);
|
||||
|
||||
if (dev == NULL)
|
||||
if (pvt->dev_d0f0 == NULL)
|
||||
goto fail;
|
||||
|
||||
pvt->dev_d0f0 = dev;
|
||||
pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
|
||||
|
||||
return 0;
|
||||
|
||||
fail:
|
||||
pci_dev_put(pvt->bridge_ck);
|
||||
pci_dev_put(pvt->dev_d0f1);
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1385,7 +1379,6 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
|
||||
fail:
|
||||
pci_dev_put(pvt->dev_d0f0);
|
||||
pci_dev_put(pvt->dev_d0f1);
|
||||
pci_dev_put(pvt->bridge_ck);
|
||||
edac_mc_free(mci);
|
||||
|
||||
return -ENODEV;
|
||||
@ -1419,7 +1412,6 @@ static void e752x_remove_one(struct pci_dev *pdev)
|
||||
pvt = (struct e752x_pvt *)mci->pvt_info;
|
||||
pci_dev_put(pvt->dev_d0f0);
|
||||
pci_dev_put(pvt->dev_d0f1);
|
||||
pci_dev_put(pvt->bridge_ck);
|
||||
edac_mc_free(mci);
|
||||
}
|
||||
|
||||
|
@ -464,6 +464,8 @@ static void i3200_remove_one(struct pci_dev *pdev)
|
||||
iounmap(priv->window);
|
||||
|
||||
edac_mc_free(mci);
|
||||
|
||||
pci_disable_device(pdev);
|
||||
}
|
||||
|
||||
static const struct pci_device_id i3200_pci_tbl[] = {
|
||||
|
@ -869,16 +869,13 @@ static void i5100_init_csrows(struct mem_ctl_info *mci)
|
||||
chan, rank, 0);
|
||||
|
||||
dimm->nr_pages = npages;
|
||||
if (npages) {
|
||||
dimm->grain = 32;
|
||||
dimm->dtype = (priv->mtr[chan][rank].width == 4) ?
|
||||
DEV_X4 : DEV_X8;
|
||||
dimm->mtype = MEM_RDDR2;
|
||||
dimm->edac_mode = EDAC_SECDED;
|
||||
snprintf(dimm->label, sizeof(dimm->label),
|
||||
"DIMM%u",
|
||||
i5100_rank_to_slot(mci, chan, rank));
|
||||
}
|
||||
dimm->grain = 32;
|
||||
dimm->dtype = (priv->mtr[chan][rank].width == 4) ?
|
||||
DEV_X4 : DEV_X8;
|
||||
dimm->mtype = MEM_RDDR2;
|
||||
dimm->edac_mode = EDAC_SECDED;
|
||||
snprintf(dimm->label, sizeof(dimm->label), "DIMM%u",
|
||||
i5100_rank_to_slot(mci, chan, rank));
|
||||
|
||||
edac_dbg(2, "dimm channel %d, rank %d, size %ld\n",
|
||||
chan, rank, (long)PAGES_TO_MiB(npages));
|
||||
|
@ -1408,6 +1408,8 @@ static void i5400_remove_one(struct pci_dev *pdev)
|
||||
/* retrieve references to resources, and free those resources */
|
||||
i5400_put_devices(mci);
|
||||
|
||||
pci_disable_device(pdev);
|
||||
|
||||
edac_mc_free(mci);
|
||||
}
|
||||
|
||||
|
@ -1708,7 +1708,7 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci,
|
||||
const struct mce *m)
|
||||
{
|
||||
struct i7core_pvt *pvt = mci->pvt_info;
|
||||
char *type, *optype, *err;
|
||||
char *optype, *err;
|
||||
enum hw_event_mc_err_type tp_event;
|
||||
unsigned long error = m->status & 0x1ff0000l;
|
||||
bool uncorrected_error = m->mcgstatus & 1ll << 61;
|
||||
@ -1721,15 +1721,11 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci,
|
||||
u32 errnum = find_first_bit(&error, 32);
|
||||
|
||||
if (uncorrected_error) {
|
||||
if (ripv) {
|
||||
type = "FATAL";
|
||||
if (ripv)
|
||||
tp_event = HW_EVENT_ERR_FATAL;
|
||||
} else {
|
||||
type = "NON_FATAL";
|
||||
else
|
||||
tp_event = HW_EVENT_ERR_UNCORRECTED;
|
||||
}
|
||||
} else {
|
||||
type = "CORRECTED";
|
||||
tp_event = HW_EVENT_ERR_CORRECTED;
|
||||
}
|
||||
|
||||
|
@ -406,8 +406,6 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
|
||||
|
||||
edac_dbg(0, "\n");
|
||||
|
||||
ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
|
||||
|
||||
if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
|
||||
return -ENODEV;
|
||||
drc = readl(ovrfl_window + I82875P_DRC);
|
||||
|
@ -741,6 +741,36 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
|
||||
if (amd_filter_mce(m))
|
||||
return NOTIFY_STOP;
|
||||
|
||||
pr_emerg(HW_ERR "%s\n", decode_error_status(m));
|
||||
|
||||
pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",
|
||||
m->extcpu,
|
||||
c->x86, c->x86_model, c->x86_mask,
|
||||
m->bank,
|
||||
((m->status & MCI_STATUS_OVER) ? "Over" : "-"),
|
||||
((m->status & MCI_STATUS_UC) ? "UE" : "CE"),
|
||||
((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"),
|
||||
((m->status & MCI_STATUS_PCC) ? "PCC" : "-"),
|
||||
((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-"));
|
||||
|
||||
if (c->x86 == 0x15 || c->x86 == 0x16)
|
||||
pr_cont("|%s|%s",
|
||||
((m->status & MCI_STATUS_DEFERRED) ? "Deferred" : "-"),
|
||||
((m->status & MCI_STATUS_POISON) ? "Poison" : "-"));
|
||||
|
||||
/* do the two bits[14:13] together */
|
||||
ecc = (m->status >> 45) & 0x3;
|
||||
if (ecc)
|
||||
pr_cont("|%sECC", ((ecc == 2) ? "C" : "U"));
|
||||
|
||||
pr_cont("]: 0x%016llx\n", m->status);
|
||||
|
||||
if (m->status & MCI_STATUS_ADDRV)
|
||||
pr_emerg(HW_ERR "MC%d_ADDR: 0x%016llx\n", m->bank, m->addr);
|
||||
|
||||
if (!fam_ops)
|
||||
goto err_code;
|
||||
|
||||
switch (m->bank) {
|
||||
case 0:
|
||||
decode_mc0_mce(m);
|
||||
@ -774,33 +804,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
|
||||
break;
|
||||
}
|
||||
|
||||
pr_emerg(HW_ERR "Error Status: %s\n", decode_error_status(m));
|
||||
|
||||
pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",
|
||||
m->extcpu,
|
||||
c->x86, c->x86_model, c->x86_mask,
|
||||
m->bank,
|
||||
((m->status & MCI_STATUS_OVER) ? "Over" : "-"),
|
||||
((m->status & MCI_STATUS_UC) ? "UE" : "CE"),
|
||||
((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"),
|
||||
((m->status & MCI_STATUS_PCC) ? "PCC" : "-"),
|
||||
((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-"));
|
||||
|
||||
if (c->x86 == 0x15 || c->x86 == 0x16)
|
||||
pr_cont("|%s|%s",
|
||||
((m->status & MCI_STATUS_DEFERRED) ? "Deferred" : "-"),
|
||||
((m->status & MCI_STATUS_POISON) ? "Poison" : "-"));
|
||||
|
||||
/* do the two bits[14:13] together */
|
||||
ecc = (m->status >> 45) & 0x3;
|
||||
if (ecc)
|
||||
pr_cont("|%sECC", ((ecc == 2) ? "C" : "U"));
|
||||
|
||||
pr_cont("]: 0x%016llx\n", m->status);
|
||||
|
||||
if (m->status & MCI_STATUS_ADDRV)
|
||||
pr_emerg(HW_ERR "MC%d_ADDR: 0x%016llx\n", m->bank, m->addr);
|
||||
|
||||
err_code:
|
||||
amd_decode_err_code(m->status & 0xffff);
|
||||
|
||||
return NOTIFY_STOP;
|
||||
@ -816,10 +820,7 @@ static int __init mce_amd_init(void)
|
||||
struct cpuinfo_x86 *c = &boot_cpu_data;
|
||||
|
||||
if (c->x86_vendor != X86_VENDOR_AMD)
|
||||
return 0;
|
||||
|
||||
if (c->x86 < 0xf || c->x86 > 0x16)
|
||||
return 0;
|
||||
return -ENODEV;
|
||||
|
||||
fam_ops = kzalloc(sizeof(struct amd_decoder_ops), GFP_KERNEL);
|
||||
if (!fam_ops)
|
||||
@ -874,7 +875,7 @@ static int __init mce_amd_init(void)
|
||||
default:
|
||||
printk(KERN_WARNING "Huh? What family is it: 0x%x?!\n", c->x86);
|
||||
kfree(fam_ops);
|
||||
return -EINVAL;
|
||||
fam_ops = NULL;
|
||||
}
|
||||
|
||||
pr_info("MCE: In-kernel MCE decoding enabled.\n");
|
||||
|
@ -357,7 +357,7 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
|
||||
pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
|
||||
res = devm_request_irq(&op->dev, pdata->irq,
|
||||
mpc85xx_pci_isr,
|
||||
IRQF_DISABLED | IRQF_SHARED,
|
||||
IRQF_SHARED,
|
||||
"[EDAC] PCI err", pci);
|
||||
if (res < 0) {
|
||||
printk(KERN_ERR
|
||||
@ -633,7 +633,7 @@ static int mpc85xx_l2_err_probe(struct platform_device *op)
|
||||
if (edac_op_state == EDAC_OPSTATE_INT) {
|
||||
pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
|
||||
res = devm_request_irq(&op->dev, pdata->irq,
|
||||
mpc85xx_l2_isr, IRQF_DISABLED,
|
||||
mpc85xx_l2_isr, 0,
|
||||
"[EDAC] L2 err", edac_dev);
|
||||
if (res < 0) {
|
||||
printk(KERN_ERR
|
||||
@ -1133,7 +1133,7 @@ static int mpc85xx_mc_err_probe(struct platform_device *op)
|
||||
pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
|
||||
res = devm_request_irq(&op->dev, pdata->irq,
|
||||
mpc85xx_mc_isr,
|
||||
IRQF_DISABLED | IRQF_SHARED,
|
||||
IRQF_SHARED,
|
||||
"[EDAC] MC err", mci);
|
||||
if (res < 0) {
|
||||
printk(KERN_ERR "%s: Unable to request irq %d for "
|
||||
|
@ -1263,7 +1263,7 @@ static int sbridge_get_onedevice(struct pci_dev **prev,
|
||||
struct pci_dev *pdev = NULL;
|
||||
u8 bus = 0;
|
||||
|
||||
sbridge_printk(KERN_INFO,
|
||||
sbridge_printk(KERN_DEBUG,
|
||||
"Seeking for: dev %02x.%d PCI ID %04x:%04x\n",
|
||||
dev_descr->dev, dev_descr->func,
|
||||
PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
|
||||
|
@ -528,6 +528,8 @@
|
||||
#define PCI_DEVICE_ID_AMD_15H_NB_F5 0x1605
|
||||
#define PCI_DEVICE_ID_AMD_16H_NB_F3 0x1533
|
||||
#define PCI_DEVICE_ID_AMD_16H_NB_F4 0x1534
|
||||
#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 0x1583
|
||||
#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584
|
||||
#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
|
||||
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
|
||||
#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
|
||||
|
Loading…
Reference in New Issue
Block a user