AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

arm-soc: bug fixes for v3.6-rc

Browse Source 
A couple of samsung clock locking fixes, at91 device tree gpio
 configuration fix and a couple more for shmobile and i.MX.
 
 All small targeted fixes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQW6/SAAoJEIwa5zzehBx3b94QAJIhnBYalG3bcmCWjs8TYwIf
 WxYELe2KMn0rAK1QoTzo7oq/yyBLbtBdnyxVUQDHLXlrLlDwKU8hVcBDe/OT2C+t
 rJ8F0c7VqpUhW9QSJoUqaVhhnYg5KHXhEy6XAnBF0GOrUUH7M6dtHBsYFtd3J8Wp
 HnBU9UqPOJ979lV/tYKW+3AAApJ8tGr53KpoGhhUnlM3MyIyreYevvcAUbj4SDHg
 VIirlmDXYf4XO3w1Sg15aqYgx9qDkR6huKV+UrsKTW4xZxeat8K4Q5D0/qrBuXyH
 c1C7BeG5GPg52h/e3qMaiTLbzTrLMRvs1tlgLDj4ZNUB8WfFedj0i+4M+LXcWcyt
 fFlrZJLw+LlDlf0u+ReeDHJaKA0offAVr1W3r6yvRPfaAw+RSocaoP2BYeiZquhG
 1j83qPYBaPQGriN6wOECmceHl3v4hyva0rmA1tksjKlFXnw06TaceoVN4UiZwRCa
 gwL9MVdTC5TFGCNXUfzBLB9bpZOhvoV/fAmKAMfFw8ybAke/P76ko/Ssw+rNVx+2
 4ln5S5AOYMztwemRXf5SfroG7AM4JqcfrP02yZnXcZrF4kGVTtGSKJKfFebLfQ5o
 1QgLm8e1qk6Wmo1LWh1U3T4yXO227498tXWuyFYxG4avl+wzsK/8pxNyxzWFDnLN
 AJBcxlWWaCvA6aX4eODx
 =nNwT
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc bug fixes from Olof Johansson:
 "A couple of samsung clock locking fixes, at91 device tree gpio
  configuration fix and a couple more for shmobile and i.MX.

  All small targeted fixes."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM i.MX25: Make timer irq work again
  ARM: imx: armadillo5x0: Fix illegal register access
  ARM: shmobile: kzm9g: bugfix: correct mmcif interrupt settings
  ARM: SAMSUNG: Use spin_lock_{irqsave,irqrestore} in clk_set_rate
  ARM: at91: fix missing #interrupt-cells on gpio-controller
  ARM: SAMSUNG: use spin_lock_irqsave() in clk_set_parent
This commit is contained in:
Linus Torvalds 2012-09-21 12:14:47 -07:00
commit 633650132e
10 changed files with 33 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/at91sam9260.dtsi
View File

@ -104,6 +104,7 @@ pioA: gpio@fffff400 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioB: gpio@fffff600 {
@ -113,6 +114,7 @@ pioB: gpio@fffff600 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioC: gpio@fffff800 {
@ -122,6 +124,7 @@ pioC: gpio@fffff800 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
dbgu: serial@fffff200 {

5
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -95,6 +95,7 @@ pioA: gpio@fffff200 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioB: gpio@fffff400 {
@ -104,6 +105,7 @@ pioB: gpio@fffff400 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioC: gpio@fffff600 {
@ -113,6 +115,7 @@ pioC: gpio@fffff600 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioD: gpio@fffff800 {
@ -122,6 +125,7 @@ pioD: gpio@fffff800 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioE: gpio@fffffa00 {
@ -131,6 +135,7 @@ pioE: gpio@fffffa00 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
dbgu: serial@ffffee00 {

5
arch/arm/boot/dts/at91sam9g45.dtsi
View File

@ -113,6 +113,7 @@ pioA: gpio@fffff200 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioB: gpio@fffff400 {
@ -122,6 +123,7 @@ pioB: gpio@fffff400 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioC: gpio@fffff600 {
@ -131,6 +133,7 @@ pioC: gpio@fffff600 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioD: gpio@fffff800 {
@ -140,6 +143,7 @@ pioD: gpio@fffff800 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioE: gpio@fffffa00 {
@ -149,6 +153,7 @@ pioE: gpio@fffffa00 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
dbgu: serial@ffffee00 {

4
arch/arm/boot/dts/at91sam9n12.dtsi
View File

@ -107,6 +107,7 @@ pioA: gpio@fffff400 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioB: gpio@fffff600 {
@ -116,6 +117,7 @@ pioB: gpio@fffff600 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioC: gpio@fffff800 {
@ -125,6 +127,7 @@ pioC: gpio@fffff800 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioD: gpio@fffffa00 {
@ -134,6 +137,7 @@ pioD: gpio@fffffa00 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
dbgu: serial@fffff200 {

4
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -115,6 +115,7 @@ pioA: gpio@fffff400 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioB: gpio@fffff600 {
@ -124,6 +125,7 @@ pioB: gpio@fffff600 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioC: gpio@fffff800 {
@ -133,6 +135,7 @@ pioC: gpio@fffff800 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
pioD: gpio@fffffa00 {
@ -142,6 +145,7 @@ pioD: gpio@fffffa00 {
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
dbgu: serial@fffff200 {

2
arch/arm/mach-imx/clk-imx25.c
View File

@ -241,6 +241,6 @@ int __init mx25_clocks_init(void)
clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
clk_register_clkdev(clk[iim_ipg], "iim", NULL);
mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
return 0;
}

3
arch/arm/mach-imx/mach-armadillo5x0.c
View File

@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
/* set NAND page size to 2k if not configured via boot mode pins */
__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
__raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
(1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
/* RTC */
/* Get RTC IRQ and register the chip */

4
arch/arm/mach-shmobile/board-kzm9g.c
View File

@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(141),
.start = gic_spi(140),
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = gic_spi(140),
.start = gic_spi(141),
.flags = IORESOURCE_IRQ,
},
};

1
arch/arm/plat-mxc/include/mach/mx25.h
View File

@ -98,6 +98,7 @@
#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
#define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
#define MX25_DMA_REQ_SSI2_RX1 22

10
arch/arm/plat-samsung/clock.c
View File

@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
int clk_set_rate(struct clk *clk, unsigned long rate)
{
unsigned long flags;
int ret;
if (IS_ERR(clk))
@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
if (clk->ops == NULL || clk->ops->set_rate == NULL)
return -EINVAL;
spin_lock(&clocks_lock);
spin_lock_irqsave(&clocks_lock, flags);
ret = (clk->ops->set_rate)(clk, rate);
spin_unlock(&clocks_lock);
spin_unlock_irqrestore(&clocks_lock, flags);
return ret;
}
@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk)
int clk_set_parent(struct clk *clk, struct clk *parent)
{
unsigned long flags;
int ret = 0;
if (IS_ERR(clk))
return -EINVAL;
spin_lock(&clocks_lock);
spin_lock_irqsave(&clocks_lock, flags);
if (clk->ops && clk->ops->set_parent)
ret = (clk->ops->set_parent)(clk, parent);
spin_unlock(&clocks_lock);
spin_unlock_irqrestore(&clocks_lock, flags);
return ret;
}