forked from luck/tmp_suning_uos_patched
[ARM] pxa: make pxa_gpio_irq_type() processor generic
The main issue here is that pxa3xx does not have GAFRx registers, access directly to these registers should be avoided for pxa3xx: 1. introduce __gpio_is_occupied() to indicate the GAFRx and GPDRx registers are already configured on pxa{25x,27x} while returns 0 always on pxa3xx 2. pxa_gpio_mode(gpio | GPIO_IN) is replaced directly with assign- ment of GPDRx, the side effect of this change is that the pin _must_ be configured before use, pxa_gpio_irq_type() will not change the pin to GPIO, as this restriction is sane, esp. with the new MFP framework Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -164,6 +164,20 @@ static long GPIO_IRQ_rising_edge[4];
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static long GPIO_IRQ_falling_edge[4];
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static long GPIO_IRQ_mask[4];
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/*
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* On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
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* function of a GPIO, and GPDRx cannot be altered once configured. It
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* is attributed as "occupied" here (I know this terminology isn't
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* accurate, you are welcome to propose a better one :-)
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*/
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static int __gpio_is_occupied(unsigned gpio)
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{
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if (cpu_is_pxa25x() || cpu_is_pxa27x())
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return GAFR(gpio) & (0x3 << (((gpio) & 0xf) * 2));
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else
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return 0;
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}
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static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
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{
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int gpio, idx;
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@ -179,12 +193,14 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
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GPIO_IRQ_falling_edge[idx] |
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GPDR(gpio)) & GPIO_bit(gpio))
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return 0;
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if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2)))
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if (__gpio_is_occupied(gpio))
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return 0;
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type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
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}
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pxa_gpio_mode(gpio | GPIO_IN);
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GPDR(gpio) &= ~GPIO_bit(gpio);
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if (type & IRQ_TYPE_EDGE_RISING)
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__set_bit(gpio, GPIO_IRQ_rising_edge);
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