AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

drm/i915: Storage class should be before const qualifier

Browse Source 
The C99 specification states in section 6.11.5:

The placement of a storage-class specifier other than at the beginning
of the declaration specifiers in a declaration is an obsolescent
feature.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Tobias Klauser 2009-12-23 14:14:34 +01:00 committed by Eric Anholt
parent cda9d05c49
commit 69e302a998
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/drm/i915/intel_display.c
View File

@ -2448,7 +2448,7 @@ static void pineview_enable_cxsr(struct drm_device *dev, unsigned long clock,
* A value of 5us seems to be a good balance; safe for very low end * A value of 5us seems to be a good balance; safe for very low end
* platforms but not overly aggressive on lower latency configs. * platforms but not overly aggressive on lower latency configs.
*/ */
const static int latency_ns = 5000; static const int latency_ns = 5000;
static int i9xx_get_fifo_size(struct drm_device *dev, int plane) static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
{ {
@ -2559,7 +2559,7 @@ static void g4x_update_wm(struct drm_device *dev, int planea_clock,
/* Calc sr entries for one plane configs */ /* Calc sr entries for one plane configs */
if (sr_hdisplay && (!planea_clock || !planeb_clock)) { if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
/* self-refresh has much higher latency */ /* self-refresh has much higher latency */
const static int sr_latency_ns = 12000; static const int sr_latency_ns = 12000;
sr_clock = planea_clock ? planea_clock : planeb_clock; sr_clock = planea_clock ? planea_clock : planeb_clock;
line_time_us = ((sr_hdisplay * 1000) / sr_clock); line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@ -2598,7 +2598,7 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
/* Calc sr entries for one plane configs */ /* Calc sr entries for one plane configs */
if (sr_hdisplay && (!planea_clock || !planeb_clock)) { if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
/* self-refresh has much higher latency */ /* self-refresh has much higher latency */
const static int sr_latency_ns = 12000; static const int sr_latency_ns = 12000;
sr_clock = planea_clock ? planea_clock : planeb_clock; sr_clock = planea_clock ? planea_clock : planeb_clock;
line_time_us = ((sr_hdisplay * 1000) / sr_clock); line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@ -2667,7 +2667,7 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
if (HAS_FW_BLC(dev) && sr_hdisplay && if (HAS_FW_BLC(dev) && sr_hdisplay &&
(!planea_clock || !planeb_clock)) { (!planea_clock || !planeb_clock)) {
/* self-refresh has much higher latency */ /* self-refresh has much higher latency */
const static int sr_latency_ns = 6000; static const int sr_latency_ns = 6000;
sr_clock = planea_clock ? planea_clock : planeb_clock; sr_clock = planea_clock ? planea_clock : planeb_clock;
line_time_us = ((sr_hdisplay * 1000) / sr_clock); line_time_us = ((sr_hdisplay * 1000) / sr_clock);