forked from luck/tmp_suning_uos_patched
perf/x86-ibs: Fix frequency profiling
Fixing profiling at a fixed frequency, in this case the freq value and sample period was setup incorrectly. Since sampling periods are adjusted we also allow periods that have lower 4 bits set. Another fix is the setup of the hw counter: If we modify hwc->sample_period, we also need to update hwc->last_period and hwc->period_left. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1333390758-10893-5-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -162,9 +162,16 @@ static int perf_ibs_init(struct perf_event *event)
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if (config & perf_ibs->cnt_mask)
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/* raw max_cnt may not be set */
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return -EINVAL;
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if (hwc->sample_period & 0x0f)
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/* lower 4 bits can not be set in ibs max cnt */
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if (!event->attr.sample_freq && hwc->sample_period & 0x0f)
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/*
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* lower 4 bits can not be set in ibs max cnt,
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* but allowing it in case we adjust the
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* sample period to set a frequency.
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*/
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return -EINVAL;
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hwc->sample_period &= ~0x0FULL;
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if (!hwc->sample_period)
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hwc->sample_period = 0x10;
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} else {
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max_cnt = config & perf_ibs->cnt_mask;
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config &= ~perf_ibs->cnt_mask;
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@ -175,6 +182,13 @@ static int perf_ibs_init(struct perf_event *event)
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if (!hwc->sample_period)
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return -EINVAL;
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/*
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* If we modify hwc->sample_period, we also need to update
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* hwc->last_period and hwc->period_left.
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*/
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hwc->last_period = hwc->sample_period;
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local64_set(&hwc->period_left, hwc->sample_period);
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hwc->config_base = perf_ibs->msr;
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hwc->config = config;
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