forked from luck/tmp_suning_uos_patched
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: [libata] ata_piix: Enable parallel scan sata_nv: use hardreset only for post-boot probing [libata] ahci: Restore SB600 SATA controller 64 bit DMA ata_piix: Remove stale comment ata_piix: Turn on hotplugging support for older chips ahci: misc cleanups for EM stuff [libata] get rid of ATA_MAX_QUEUE loop in ata_qc_complete_multiple() v2 sata_sil: enable 32-bit PIO sata_sx4: speed up ECC initialization libata-sff: avoid byte swapping in ata_sff_data_xfer() [libata] ahci: use less error-prone array initializers
This commit is contained in:
Linus Torvalds
commit
6adc74b7d0
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@ -77,8 +77,6 @@ static ssize_t ahci_led_store(struct ata_port *ap, const char *buf,
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size_t size);
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static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
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ssize_t size);
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#define MAX_SLOTS 8
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#define MAX_RETRY 15
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enum {
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AHCI_PCI_BAR = 5,
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@ -231,6 +229,10 @@ enum {
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ICH_MAP = 0x90, /* ICH MAP register */
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/* em constants */
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EM_MAX_SLOTS = 8,
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EM_MAX_RETRY = 5,
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/* em_ctl bits */
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EM_CTL_RST = (1 << 9), /* Reset */
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EM_CTL_TM = (1 << 8), /* Transmit Message */
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@ -282,8 +284,8 @@ struct ahci_port_priv {
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unsigned int ncq_saw_dmas:1;
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unsigned int ncq_saw_sdb:1;
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u32 intr_mask; /* interrupts to enable */
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struct ahci_em_priv em_priv[MAX_SLOTS];/* enclosure management info
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* per PM slot */
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/* enclosure management info per PM slot */
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struct ahci_em_priv em_priv[EM_MAX_SLOTS];
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};
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static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
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@ -313,7 +315,6 @@ static void ahci_error_handler(struct ata_port *ap);
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static void ahci_post_internal_cmd(struct ata_queued_cmd *qc);
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static int ahci_port_resume(struct ata_port *ap);
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static void ahci_dev_config(struct ata_device *dev);
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static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl);
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static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
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u32 opts);
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#ifdef CONFIG_PM
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@ -404,14 +405,14 @@ static struct ata_port_operations ahci_sb600_ops = {
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#define AHCI_HFLAGS(flags) .private_data = (void *)(flags)
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static const struct ata_port_info ahci_port_info[] = {
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/* board_ahci */
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[board_ahci] =
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{
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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},
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/* board_ahci_vt8251 */
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[board_ahci_vt8251] =
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{
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AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP),
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.flags = AHCI_FLAG_COMMON,
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@ -419,7 +420,7 @@ static const struct ata_port_info ahci_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_vt8251_ops,
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},
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/* board_ahci_ign_iferr */
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[board_ahci_ign_iferr] =
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{
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AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR),
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.flags = AHCI_FLAG_COMMON,
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@ -427,17 +428,16 @@ static const struct ata_port_info ahci_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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},
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/* board_ahci_sb600 */
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[board_ahci_sb600] =
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{
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AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL |
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AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI |
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AHCI_HFLAG_SECT255),
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AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255),
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_sb600_ops,
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},
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/* board_ahci_mv */
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[board_ahci_mv] =
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{
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AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI |
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AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP),
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@ -447,7 +447,7 @@ static const struct ata_port_info ahci_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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},
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/* board_ahci_sb700, for SB700 and SB800 */
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[board_ahci_sb700] = /* for SB700 and SB800 */
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{
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AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL),
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.flags = AHCI_FLAG_COMMON,
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@ -455,7 +455,7 @@ static const struct ata_port_info ahci_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_sb600_ops,
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},
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/* board_ahci_mcp65 */
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[board_ahci_mcp65] =
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{
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AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ),
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.flags = AHCI_FLAG_COMMON,
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@ -463,7 +463,7 @@ static const struct ata_port_info ahci_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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},
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/* board_ahci_nopmp */
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[board_ahci_nopmp] =
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{
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AHCI_HFLAGS (AHCI_HFLAG_NO_PMP),
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.flags = AHCI_FLAG_COMMON,
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@ -1141,12 +1141,12 @@ static void ahci_start_port(struct ata_port *ap)
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emp = &pp->em_priv[link->pmp];
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/* EM Transmit bit maybe busy during init */
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for (i = 0; i < MAX_RETRY; i++) {
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for (i = 0; i < EM_MAX_RETRY; i++) {
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rc = ahci_transmit_led_message(ap,
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emp->led_state,
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4);
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if (rc == -EBUSY)
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udelay(100);
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msleep(1);
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else
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break;
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}
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@ -1340,7 +1340,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
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/* get the slot number from the message */
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pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
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if (pmp < MAX_SLOTS)
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if (pmp < EM_MAX_SLOTS)
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emp = &pp->em_priv[pmp];
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else
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return -EINVAL;
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@ -1408,7 +1408,7 @@ static ssize_t ahci_led_store(struct ata_port *ap, const char *buf,
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/* get the slot number from the message */
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pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
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if (pmp < MAX_SLOTS)
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if (pmp < EM_MAX_SLOTS)
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emp = &pp->em_priv[pmp];
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else
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return -EINVAL;
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@ -2584,6 +2584,51 @@ static void ahci_p5wdh_workaround(struct ata_host *host)
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}
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}
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/*
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* SB600 ahci controller on ASUS M2A-VM can't do 64bit DMA with older
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* BIOS. The oldest version known to be broken is 0901 and working is
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* 1501 which was released on 2007-10-26. Force 32bit DMA on anything
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* older than 1501. Please read bko#9412 for more info.
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*/
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static bool ahci_asus_m2a_vm_32bit_only(struct pci_dev *pdev)
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{
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static const struct dmi_system_id sysids[] = {
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{
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.ident = "ASUS M2A-VM",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR,
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"ASUSTeK Computer INC."),
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DMI_MATCH(DMI_BOARD_NAME, "M2A-VM"),
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},
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},
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{ }
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};
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const char *cutoff_mmdd = "10/26";
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const char *date;
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int year;
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if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(0x12, 0) ||
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!dmi_check_system(sysids))
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return false;
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/*
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* Argh.... both version and date are free form strings.
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* Let's hope they're using the same date format across
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* different versions.
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*/
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date = dmi_get_system_info(DMI_BIOS_DATE);
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year = dmi_get_year(DMI_BIOS_DATE);
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if (date && strlen(date) >= 10 && date[2] == '/' && date[5] == '/' &&
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(year > 2007 ||
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(year == 2007 && strncmp(date, cutoff_mmdd, 5) >= 0)))
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return false;
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dev_printk(KERN_WARNING, &pdev->dev, "ASUS M2A-VM: BIOS too old, "
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"forcing 32bit DMA, update BIOS\n");
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return true;
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}
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static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
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{
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static const struct dmi_system_id broken_systems[] = {
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@ -2744,6 +2789,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (board_id == board_ahci_sb700 && pdev->revision >= 0x40)
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hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL;
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/* apply ASUS M2A_VM quirk */
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if (ahci_asus_m2a_vm_32bit_only(pdev))
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hpriv->flags |= AHCI_HFLAG_32BIT_ONLY;
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if (!(hpriv->flags & AHCI_HFLAG_NO_MSI))
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pci_enable_msi(pdev);
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@ -223,9 +223,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
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/* ICH8 Mobile PATA Controller */
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{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
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/* NOTE: The following PCI ids must be kept in sync with the
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* list in drivers/pci/quirks.c.
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*/
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/* SATA ports */
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/* 82801EB (ICH5) */
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{ 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
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@ -1509,8 +1507,8 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
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dev_printk(KERN_DEBUG, &pdev->dev,
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"version " DRV_VERSION "\n");
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/* no hotplugging support (FIXME) */
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if (!in_module_init)
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/* no hotplugging support for later devices (FIXME) */
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if (!in_module_init && ent->driver_data >= ich5_sata)
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return -ENODEV;
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if (piix_broken_system_poweroff(pdev)) {
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@ -1591,6 +1589,7 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
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host->ports[1]->mwdma_mask = 0;
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host->ports[1]->udma_mask = 0;
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}
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host->flags |= ATA_HOST_PARALLEL_SCAN;
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pci_set_master(pdev);
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return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht);
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@ -5031,7 +5031,6 @@ int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
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{
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int nr_done = 0;
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u32 done_mask;
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int i;
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done_mask = ap->qc_active ^ qc_active;
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@ -5041,16 +5040,16 @@ int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
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return -EINVAL;
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}
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for (i = 0; i < ATA_MAX_QUEUE; i++) {
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while (done_mask) {
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struct ata_queued_cmd *qc;
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unsigned int tag = __ffs(done_mask);
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|
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if (!(done_mask & (1 << i)))
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continue;
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if ((qc = ata_qc_from_tag(ap, i))) {
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qc = ata_qc_from_tag(ap, tag);
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if (qc) {
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ata_qc_complete(qc);
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nr_done++;
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}
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done_mask &= ~(1 << tag);
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}
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return nr_done;
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|
|
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|
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@ -727,17 +727,23 @@ unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
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else
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iowrite16_rep(data_addr, buf, words);
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/* Transfer trailing 1 byte, if any. */
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/* Transfer trailing byte, if any. */
|
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if (unlikely(buflen & 0x01)) {
|
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__le16 align_buf[1] = { 0 };
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unsigned char *trailing_buf = buf + buflen - 1;
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unsigned char pad[2];
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|
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/* Point buf to the tail of buffer */
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buf += buflen - 1;
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|
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/*
|
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* Use io*16_rep() accessors here as well to avoid pointlessly
|
||||
* swapping bytes to and fro on the big endian machines...
|
||||
*/
|
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if (rw == READ) {
|
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align_buf[0] = cpu_to_le16(ioread16(data_addr));
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memcpy(trailing_buf, align_buf, 1);
|
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ioread16_rep(data_addr, pad, 1);
|
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*buf = pad[0];
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} else {
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memcpy(align_buf, trailing_buf, 1);
|
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iowrite16(le16_to_cpu(align_buf[0]), data_addr);
|
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pad[0] = *buf;
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iowrite16_rep(data_addr, pad, 1);
|
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}
|
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words++;
|
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}
|
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|
|
|
|||
|
|
@ -305,8 +305,8 @@ static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance);
|
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static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
|
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static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
|
||||
|
||||
static int nv_noclassify_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline);
|
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static int nv_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline);
|
||||
static void nv_nf2_freeze(struct ata_port *ap);
|
||||
static void nv_nf2_thaw(struct ata_port *ap);
|
||||
static void nv_ck804_freeze(struct ata_port *ap);
|
||||
|
|
@ -406,49 +406,82 @@ static struct scsi_host_template nv_swncq_sht = {
|
|||
.slave_configure = nv_swncq_slave_config,
|
||||
};
|
||||
|
||||
static struct ata_port_operations nv_common_ops = {
|
||||
/*
|
||||
* NV SATA controllers have various different problems with hardreset
|
||||
* protocol depending on the specific controller and device.
|
||||
*
|
||||
* GENERIC:
|
||||
*
|
||||
* bko11195 reports that link doesn't come online after hardreset on
|
||||
* generic nv's and there have been several other similar reports on
|
||||
* linux-ide.
|
||||
*
|
||||
* bko12351#c23 reports that warmplug on MCP61 doesn't work with
|
||||
* softreset.
|
||||
*
|
||||
* NF2/3:
|
||||
*
|
||||
* bko3352 reports nf2/3 controllers can't determine device signature
|
||||
* reliably after hardreset. The following thread reports detection
|
||||
* failure on cold boot with the standard debouncing timing.
|
||||
*
|
||||
* http://thread.gmane.org/gmane.linux.ide/34098
|
||||
*
|
||||
* bko12176 reports that hardreset fails to bring up the link during
|
||||
* boot on nf2.
|
||||
*
|
||||
* CK804:
|
||||
*
|
||||
* For initial probing after boot and hot plugging, hardreset mostly
|
||||
* works fine on CK804 but curiously, reprobing on the initial port
|
||||
* by rescanning or rmmod/insmod fails to acquire the initial D2H Reg
|
||||
* FIS in somewhat undeterministic way.
|
||||
*
|
||||
* SWNCQ:
|
||||
*
|
||||
* bko12351 reports that when SWNCQ is enabled, for hotplug to work,
|
||||
* hardreset should be used and hardreset can't report proper
|
||||
* signature, which suggests that mcp5x is closer to nf2 as long as
|
||||
* reset quirkiness is concerned.
|
||||
*
|
||||
* bko12703 reports that boot probing fails for intel SSD with
|
||||
* hardreset. Link fails to come online. Softreset works fine.
|
||||
*
|
||||
* The failures are varied but the following patterns seem true for
|
||||
* all flavors.
|
||||
*
|
||||
* - Softreset during boot always works.
|
||||
*
|
||||
* - Hardreset during boot sometimes fails to bring up the link on
|
||||
* certain comibnations and device signature acquisition is
|
||||
* unreliable.
|
||||
*
|
||||
* - Hardreset is often necessary after hotplug.
|
||||
*
|
||||
* So, preferring softreset for boot probing and error handling (as
|
||||
* hardreset might bring down the link) but using hardreset for
|
||||
* post-boot probing should work around the above issues in most
|
||||
* cases. Define nv_hardreset() which only kicks in for post-boot
|
||||
* probing and use it for all variants.
|
||||
*/
|
||||
static struct ata_port_operations nv_generic_ops = {
|
||||
.inherits = &ata_bmdma_port_ops,
|
||||
.lost_interrupt = ATA_OP_NULL,
|
||||
.scr_read = nv_scr_read,
|
||||
.scr_write = nv_scr_write,
|
||||
.hardreset = nv_hardreset,
|
||||
};
|
||||
|
||||
/* OSDL bz11195 reports that link doesn't come online after hardreset
|
||||
* on generic nv's and there have been several other similar reports
|
||||
* on linux-ide. Disable hardreset for generic nv's.
|
||||
*/
|
||||
static struct ata_port_operations nv_generic_ops = {
|
||||
.inherits = &nv_common_ops,
|
||||
.hardreset = ATA_OP_NULL,
|
||||
};
|
||||
|
||||
/* nf2 is ripe with hardreset related problems.
|
||||
*
|
||||
* kernel bz#3352 reports nf2/3 controllers can't determine device
|
||||
* signature reliably. The following thread reports detection failure
|
||||
* on cold boot with the standard debouncing timing.
|
||||
*
|
||||
* http://thread.gmane.org/gmane.linux.ide/34098
|
||||
*
|
||||
* And bz#12176 reports that hardreset simply doesn't work on nf2.
|
||||
* Give up on it and just don't do hardreset.
|
||||
*/
|
||||
static struct ata_port_operations nv_nf2_ops = {
|
||||
.inherits = &nv_generic_ops,
|
||||
.freeze = nv_nf2_freeze,
|
||||
.thaw = nv_nf2_thaw,
|
||||
};
|
||||
|
||||
/* For initial probing after boot and hot plugging, hardreset mostly
|
||||
* works fine on CK804 but curiously, reprobing on the initial port by
|
||||
* rescanning or rmmod/insmod fails to acquire the initial D2H Reg FIS
|
||||
* in somewhat undeterministic way. Use noclassify hardreset.
|
||||
*/
|
||||
static struct ata_port_operations nv_ck804_ops = {
|
||||
.inherits = &nv_common_ops,
|
||||
.inherits = &nv_generic_ops,
|
||||
.freeze = nv_ck804_freeze,
|
||||
.thaw = nv_ck804_thaw,
|
||||
.hardreset = nv_noclassify_hardreset,
|
||||
.host_stop = nv_ck804_host_stop,
|
||||
};
|
||||
|
||||
|
|
@ -476,19 +509,8 @@ static struct ata_port_operations nv_adma_ops = {
|
|||
.host_stop = nv_adma_host_stop,
|
||||
};
|
||||
|
||||
/* Kernel bz#12351 reports that when SWNCQ is enabled, for hotplug to
|
||||
* work, hardreset should be used and hardreset can't report proper
|
||||
* signature, which suggests that mcp5x is closer to nf2 as long as
|
||||
* reset quirkiness is concerned. Define separate ops for mcp5x with
|
||||
* nv_noclassify_hardreset().
|
||||
*/
|
||||
static struct ata_port_operations nv_mcp5x_ops = {
|
||||
.inherits = &nv_common_ops,
|
||||
.hardreset = nv_noclassify_hardreset,
|
||||
};
|
||||
|
||||
static struct ata_port_operations nv_swncq_ops = {
|
||||
.inherits = &nv_mcp5x_ops,
|
||||
.inherits = &nv_generic_ops,
|
||||
|
||||
.qc_defer = ata_std_qc_defer,
|
||||
.qc_prep = nv_swncq_qc_prep,
|
||||
|
|
@ -557,7 +579,7 @@ static const struct ata_port_info nv_port_info[] = {
|
|||
.pio_mask = NV_PIO_MASK,
|
||||
.mwdma_mask = NV_MWDMA_MASK,
|
||||
.udma_mask = NV_UDMA_MASK,
|
||||
.port_ops = &nv_mcp5x_ops,
|
||||
.port_ops = &nv_generic_ops,
|
||||
.private_data = NV_PI_PRIV(nv_generic_interrupt, &nv_sht),
|
||||
},
|
||||
/* SWNCQ */
|
||||
|
|
@ -1559,15 +1581,24 @@ static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int nv_noclassify_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
static int nv_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
{
|
||||
bool online;
|
||||
int rc;
|
||||
struct ata_eh_context *ehc = &link->eh_context;
|
||||
|
||||
rc = sata_link_hardreset(link, sata_deb_timing_hotplug, deadline,
|
||||
&online, NULL);
|
||||
return online ? -EAGAIN : rc;
|
||||
/* Do hardreset iff it's post-boot probing, please read the
|
||||
* comment above port ops for details.
|
||||
*/
|
||||
if (!(link->ap->pflags & ATA_PFLAG_LOADING) &&
|
||||
!ata_dev_enabled(link->device))
|
||||
sata_link_hardreset(link, sata_deb_timing_hotplug, deadline,
|
||||
NULL, NULL);
|
||||
else if (!(ehc->i.flags & ATA_EHI_QUIET))
|
||||
ata_link_printk(link, KERN_INFO,
|
||||
"nv: skipping hardreset on occupied port\n");
|
||||
|
||||
/* device signature acquisition is unreliable */
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
static void nv_nf2_freeze(struct ata_port *ap)
|
||||
|
|
|
|||
|
|
@ -183,7 +183,7 @@ static struct scsi_host_template sil_sht = {
|
|||
};
|
||||
|
||||
static struct ata_port_operations sil_ops = {
|
||||
.inherits = &ata_bmdma_port_ops,
|
||||
.inherits = &ata_bmdma32_port_ops,
|
||||
.dev_config = sil_dev_config,
|
||||
.set_mode = sil_set_mode,
|
||||
.bmdma_setup = sil_bmdma_setup,
|
||||
|
|
|
|||
|
|
@ -193,6 +193,7 @@ enum {
|
|||
PDC_TIMER_MASK_INT,
|
||||
};
|
||||
|
||||
#define ECC_ERASE_BUF_SZ (128 * 1024)
|
||||
|
||||
struct pdc_port_priv {
|
||||
u8 dimm_buf[(ATA_PRD_SZ * ATA_MAX_PRD) + 512];
|
||||
|
|
@ -1280,7 +1281,6 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
|
|||
{
|
||||
int speed, size, length;
|
||||
u32 addr, spd0, pci_status;
|
||||
u32 tmp = 0;
|
||||
u32 time_period = 0;
|
||||
u32 tcount = 0;
|
||||
u32 ticks = 0;
|
||||
|
|
@ -1395,14 +1395,17 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
|
|||
pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
|
||||
PDC_DIMM_SPD_TYPE, &spd0);
|
||||
if (spd0 == 0x02) {
|
||||
void *buf;
|
||||
VPRINTK("Start ECC initialization\n");
|
||||
addr = 0;
|
||||
length = size * 1024 * 1024;
|
||||
buf = kzalloc(ECC_ERASE_BUF_SZ, GFP_KERNEL);
|
||||
while (addr < length) {
|
||||
pdc20621_put_to_dimm(host, (void *) &tmp, addr,
|
||||
sizeof(u32));
|
||||
addr += sizeof(u32);
|
||||
pdc20621_put_to_dimm(host, buf, addr,
|
||||
ECC_ERASE_BUF_SZ);
|
||||
addr += ECC_ERASE_BUF_SZ;
|
||||
}
|
||||
kfree(buf);
|
||||
VPRINTK("Finish ECC initialization\n");
|
||||
}
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -596,6 +596,7 @@ int dmi_get_year(int field)
|
|||
|
||||
return year;
|
||||
}
|
||||
EXPORT_SYMBOL(dmi_get_year);
|
||||
|
||||
/**
|
||||
* dmi_walk - Walk the DMI table and get called back for every record
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user