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ARM: imx: enable WAIT mode hardware workaround for imx6sx

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Need to enable INT_MEM_CLK_LPM bit in CCM_CGPR for WAIT mode,
without this bit set, if there is pending interrupt during
ARM platform entering WAIT mode without power gating, cache
data will be corrupted, this is a hardware workaround for WAIT
mode and must be enabled.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Anson Huang 2016-08-29 21:49:57 +08:00 committed by Shawn Guo
parent 8765caa5cb
commit 6ae44aa651
1 changed files with 1 additions and 0 deletions
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arch/arm/mach-imx/cpuidle-imx6sx.c
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@ -90,6 +90,7 @@ static struct cpuidle_driver imx6sx_cpuidle_driver = {
int __init imx6sx_cpuidle_init(void)
{
imx6_set_int_mem_clk_lpm(true);
imx6_enable_rbc(false);
/*
* set ARM power up/down timing to the fastest,