forked from luck/tmp_suning_uos_patched
Revert "atmel_lcdfb: Adjust HFP calculation so it matches the manual."
This reverts commit 5d910426a6
.
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
"Unfortunately this is not true for all the SoC that embed the
atmel_lcdfb... So I may need to rework this patch but it is certainly
not applicable in the current form."
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
This commit is contained in:
parent
193984f43d
commit
6b3cbe4094
@ -299,7 +299,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
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.xres = 240, .yres = 320,
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.pixclock = KHZ2PICOS(4965),
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.left_margin = 1, .right_margin = 34,
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.left_margin = 1, .right_margin = 33,
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.upper_margin = 1, .lower_margin = 0,
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.hsync_len = 5, .vsync_len = 1,
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@ -230,7 +230,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
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.xres = 240, .yres = 320,
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.pixclock = KHZ2PICOS(5000),
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.left_margin = 1, .right_margin = 34,
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.left_margin = 1, .right_margin = 33,
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.upper_margin = 1, .lower_margin = 0,
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.hsync_len = 5, .vsync_len = 1,
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@ -365,7 +365,7 @@ static struct fb_videomode at91_stn_modes[] = {
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.xres = 320, .yres = 240,
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.pixclock = KHZ2PICOS(1440),
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.left_margin = 1, .right_margin = 2,
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.left_margin = 1, .right_margin = 1,
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.upper_margin = 0, .lower_margin = 0,
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.hsync_len = 1, .vsync_len = 1,
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@ -426,7 +426,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
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.xres = 240, .yres = 320,
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.pixclock = KHZ2PICOS(4965),
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.left_margin = 1, .right_margin = 34,
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.left_margin = 1, .right_margin = 33,
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.upper_margin = 1, .lower_margin = 0,
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.hsync_len = 5, .vsync_len = 1,
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@ -253,7 +253,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
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.xres = 240, .yres = 320,
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.pixclock = KHZ2PICOS(4965),
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.left_margin = 1, .right_margin = 34,
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.left_margin = 1, .right_margin = 33,
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.upper_margin = 1, .lower_margin = 0,
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.hsync_len = 5, .vsync_len = 1,
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@ -192,7 +192,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
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.xres = 480, .yres = 272,
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.pixclock = KHZ2PICOS(9000),
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.left_margin = 1, .right_margin = 2,
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.left_margin = 1, .right_margin = 1,
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.upper_margin = 40, .lower_margin = 1,
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.hsync_len = 45, .vsync_len = 1,
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@ -149,7 +149,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
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.xres = 240, .yres = 320,
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.pixclock = KHZ2PICOS(4965),
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.left_margin = 1, .right_margin = 34,
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.left_margin = 1, .right_margin = 33,
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.upper_margin = 1, .lower_margin = 0,
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.hsync_len = 5, .vsync_len = 1,
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@ -400,7 +400,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
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var->lower_margin = min_t(u32, var->lower_margin,
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ATMEL_LCDC_VFP);
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var->right_margin = min_t(u32, var->right_margin,
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(ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 2);
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(ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
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var->hsync_len = min_t(u32, var->hsync_len,
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(ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
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var->left_margin = min_t(u32, var->left_margin,
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@ -585,7 +585,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
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lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
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/* Horizontal timing */
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value = (info->var.right_margin - 2) << ATMEL_LCDC_HFP_OFFSET;
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value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
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value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
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value |= (info->var.left_margin - 1);
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dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
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