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[POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and size

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According to u-boot/board/mpc8568mds/init.S:

LAW(Local Access Window) configuration:
2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Anton Vorontsov 2007-10-02 17:48:07 +04:00 committed by Kumar Gala
parent c0e4eb2d8a
commit 6b9c67681b
1 changed files with 2 additions and 2 deletions
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arch/powerpc/boot/dts/mpc8568mds.dts
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@ -226,8 +226,8 @@ pcie@a000 {
interrupt-parent = <&mpic>;
interrupts = <1a 2>;
bus-range = <0 ff>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
01000000 0 00000000 e3000000 0 08000000>;
ranges = <02000000 0 a0000000 a0000000 0 10000000
01000000 0 00000000 e2800000 0 00800000>;
clock-frequency = <1fca055>;
#interrupt-cells = <1>;
#size-cells = <2>;