forked from luck/tmp_suning_uos_patched
[S390] etr: Add barrier() to etr_sync_cpu_start().
Force reading of *in_sync in while loop. Loops where the content that is checked for is changed by a different cpu always should have some sort of barrier() semantics. Otherwise this might lead to very subtle bugs. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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118bcd31b3
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@ -747,6 +747,7 @@ static void etr_adjust_time(unsigned long long clock, unsigned long long delay)
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}
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}
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#ifdef CONFIG_SMP
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static void etr_sync_cpu_start(void *dummy)
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{
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int *in_sync = dummy;
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@ -758,8 +759,14 @@ static void etr_sync_cpu_start(void *dummy)
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* __udelay will stop the cpu on an enabled wait psw until the
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* TOD is running again.
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*/
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while (*in_sync == 0)
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while (*in_sync == 0) {
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__udelay(1);
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/*
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* A different cpu changes *in_sync. Therefore use
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* barrier() to force memory access.
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*/
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barrier();
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}
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if (*in_sync != 1)
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/* Didn't work. Clear per-cpu in sync bit again. */
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etr_disable_sync_clock(NULL);
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@ -773,6 +780,7 @@ static void etr_sync_cpu_start(void *dummy)
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static void etr_sync_cpu_end(void *dummy)
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{
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}
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#endif /* CONFIG_SMP */
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/*
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* Sync the TOD clock using the port refered to by aibp. This port
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