forked from luck/tmp_suning_uos_patched
PCI: unconditionally clear AER uncorr status register during cleanup
The current implementation of pci_cleanup_aer_uncorrect_error_status only clears either fatal or non-fatal error status bits depending on the state of the I/O channel. This implementation will then often leave some bits set after PCI error recovery completes. The uncleared bit settings will then be falsely reported the next time an AER interrupt is generated for that hierarchy. An easy way to illustrate this issue is to use the aer-inject module to simultaneously inject both an uncorrectable non-fatal and uncorrectable fatal error. One of the errors will not be cleared. This patch resolves this issue by unconditionally clearing all bits in the AER uncorrectable status register. All settings and corrective action strategies are saved and determined before pci_cleanup_aer_uncorrect_error_status is called, so this change should not affect errory handling functionality. Signed-off-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -84,19 +84,15 @@ EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
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int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
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{
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int pos;
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u32 status, mask;
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u32 status;
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pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
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if (!pos)
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return -EIO;
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pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
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pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
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if (dev->error_state == pci_channel_io_normal)
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status &= ~mask; /* Clear corresponding nonfatal bits */
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else
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status &= mask; /* Clear corresponding fatal bits */
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pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
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if (status)
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pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
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return 0;
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}
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