forked from luck/tmp_suning_uos_patched
ARM: OMAP2+: hwmod_data: fix missing OMAP_INTC_START in irq data
Commit7d7e1eb
(ARM: OMAP2+: Prepare for irqs.h removal) and commitec2c082
(ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ) updated the way interrupts for OMAP2/3 devices are defined in the HWMOD data structures to being an index plus a fixed offset (defined by OMAP_INTC_START). Couple of irqs in the OMAP2/3 hwmod data were misconfigured completely as they were missing this OMAP_INTC_START relative offset. Add this offset back to fix the incorrect irq data for the following modules: OMAP2 - GPMC, RNG OMAP3 - GPMC, ISP MMU & IVA MMU Signed-off-by: Suman Anna <s-anna@ti.com> Fixes:7d7e1eba7e
("ARM: OMAP2+: Prepare for irqs.h removal") Fixes:ec2c0825ca
("ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ") Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -796,7 +796,7 @@ struct omap_hwmod omap2xxx_counter_32k_hwmod = {
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/* gpmc */
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static struct omap_hwmod_irq_info omap2xxx_gpmc_irqs[] = {
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{ .irq = 20 },
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{ .irq = 20 + OMAP_INTC_START, },
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{ .irq = -1 }
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};
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@ -841,7 +841,7 @@ static struct omap_hwmod_class omap2_rng_hwmod_class = {
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};
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static struct omap_hwmod_irq_info omap2_rng_mpu_irqs[] = {
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{ .irq = 52 },
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{ .irq = 52 + OMAP_INTC_START, },
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{ .irq = -1 }
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};
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@ -2172,7 +2172,7 @@ static struct omap_hwmod_class omap3xxx_gpmc_hwmod_class = {
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};
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static struct omap_hwmod_irq_info omap3xxx_gpmc_irqs[] = {
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{ .irq = 20 },
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{ .irq = 20 + OMAP_INTC_START, },
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{ .irq = -1 }
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};
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@ -3006,7 +3006,7 @@ static struct omap_mmu_dev_attr mmu_isp_dev_attr = {
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static struct omap_hwmod omap3xxx_mmu_isp_hwmod;
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static struct omap_hwmod_irq_info omap3xxx_mmu_isp_irqs[] = {
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{ .irq = 24 },
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{ .irq = 24 + OMAP_INTC_START, },
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{ .irq = -1 }
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};
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@ -3048,7 +3048,7 @@ static struct omap_mmu_dev_attr mmu_iva_dev_attr = {
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static struct omap_hwmod omap3xxx_mmu_iva_hwmod;
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static struct omap_hwmod_irq_info omap3xxx_mmu_iva_irqs[] = {
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{ .irq = 28 },
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{ .irq = 28 + OMAP_INTC_START, },
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{ .irq = -1 }
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};
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