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igb: add flushes between RAR writes when setting mac address

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There are some switches that will do write combining when they see two
sequential regions written. In order to avoid any possible write combining
issues it is necessary to add a flush after writing each piece of a rar
register.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Alexander Duyck 2009-10-05 06:36:01 +00:00 committed by David S. Miller
parent 2553bb2681
commit 6deac6f2b4
1 changed files with 7 additions and 0 deletions
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7
drivers/net/igb/e1000_mac.c
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@ -247,8 +247,15 @@ void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
if (rar_low || rar_high) if (rar_low || rar_high)
rar_high |= E1000_RAH_AV; rar_high |= E1000_RAH_AV;
/*
* Some bridges will combine consecutive 32-bit writes into
* a single burst write, which will malfunction on some parts.
* The flushes avoid this.
*/
wr32(E1000_RAL(index), rar_low); wr32(E1000_RAL(index), rar_low);
wrfl();
wr32(E1000_RAH(index), rar_high); wr32(E1000_RAH(index), rar_high);
wrfl();
} }
/** /**