AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6

Browse Source
This commit is contained in:
Linus Torvalds 2005-09-29 08:55:43 -07:00
commit 6dec3cf5cd
5 changed files with 22 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/sparc64/kernel/cpu.c
View File

@ -39,6 +39,8 @@ struct cpu_fp_info linux_sparc_fpu[] = {
{ 0x3e, 0x15, 0, "UltraSparc III+ integrated FPU"},
{ 0x3e, 0x16, 0, "UltraSparc IIIi integrated FPU"},
{ 0x3e, 0x18, 0, "UltraSparc IV integrated FPU"},
{ 0x3e, 0x19, 0, "UltraSparc IV+ integrated FPU"},
{ 0x3e, 0x22, 0, "UltraSparc IIIi+ integrated FPU"},
};
#define NSPARCFPU (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info))
@ -53,6 +55,8 @@ struct cpu_iu_info linux_sparc_chips[] = {
{ 0x3e, 0x15, "TI UltraSparc III+ (Cheetah+)"},
{ 0x3e, 0x16, "TI UltraSparc IIIi (Jalapeno)"},
{ 0x3e, 0x18, "TI UltraSparc IV (Jaguar)"},
{ 0x3e, 0x19, "TI UltraSparc IV+ (Panther)"},
{ 0x3e, 0x22, "TI UltraSparc IIIi+ (Serrano)"},
};
#define NSPARCCHIPS (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info))

10
arch/sparc64/kernel/unaligned.c
View File

@ -294,7 +294,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u
kernel_mna_trap_fault();
} else {
unsigned long addr;
unsigned long addr, *reg_addr;
int orig_asi, asi;
addr = compute_effective_address(regs, insn,
@ -319,11 +319,11 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u
};
switch (dir) {
case load:
do_int_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
size, (unsigned long *) addr,
reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
do_int_load(reg_addr, size, (unsigned long *) addr,
decode_signedness(insn), asi);
if (unlikely(asi != orig_asi)) {
unsigned long val_in = *(unsigned long *) addr;
unsigned long val_in = *reg_addr;
switch (size) {
case 2:
val_in = swab16(val_in);
@ -339,7 +339,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u
BUG();
break;
};
*(unsigned long *) addr = val_in;
*reg_addr = val_in;
}
break;

5
arch/sparc64/kernel/us3_cpufreq.c
View File

@ -208,7 +208,10 @@ static int __init us3_freq_init(void)
impl = ((ver >> 32) & 0xffff);
if (manuf == CHEETAH_MANUF &&
(impl == CHEETAH_IMPL || impl == CHEETAH_PLUS_IMPL)) {
(impl == CHEETAH_IMPL ||
impl == CHEETAH_PLUS_IMPL ||
impl == JAGUAR_IMPL ||
impl == PANTHER_IMPL)) {
struct cpufreq_driver *driver;
ret = -ENOMEM;

9
include/asm-sparc64/head.h
View File

@ -12,9 +12,12 @@
#define __JALAPENO_ID 0x003e0016
#define CHEETAH_MANUF 0x003e
#define CHEETAH_IMPL 0x0014
#define CHEETAH_PLUS_IMPL 0x0015
#define JALAPENO_IMPL 0x0016
#define CHEETAH_IMPL 0x0014 /* Ultra-III */
#define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */
#define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */
#define JAGUAR_IMPL 0x0018 /* Ultra-IV */
#define PANTHER_IMPL 0x0019 /* Ultra-IV+ */
#define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */
#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
rdpr %ver, %tmp1; \

4
include/asm-sparc64/pgtable.h
View File

@ -98,7 +98,9 @@
#define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */
#define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */
#define _PAGE_SOFT2 _AC(0x07FC000000000000,UL) /* Software bits, set 2 */
#define _PAGE_RES1 _AC(0x0003000000000000,UL) /* Reserved */
#define _PAGE_RES1 _AC(0x0002000000000000,UL) /* Reserved */
#define _PAGE_SZ32MB _AC(0x0001000000000000,UL) /* (Panther) 32MB page */
#define _PAGE_SZ256MB _AC(0x2001000000000000,UL) /* (Panther) 256MB page */
#define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */
#define _PAGE_RES2 _AC(0x0000780000000000,UL) /* Reserved */
#define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr[40:13]*/