forked from luck/tmp_suning_uos_patched
via-velocity: Add ethtool interrupt coalescing support
(Partially from the upstream VIA driver). Tweaking the number of frames-per-interrupt and timer-until-interrupt can reduce the amount of CPU work quite a lot. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net> Signed-off-by: David S. Miller <davem@davemloft.net>
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da95b2d422
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@ -1246,6 +1246,66 @@ static void mii_init(struct velocity_info *vptr, u32 mii_status)
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}
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}
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/**
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* setup_queue_timers - Setup interrupt timers
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*
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* Setup interrupt frequency during suppression (timeout if the frame
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* count isn't filled).
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*/
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static void setup_queue_timers(struct velocity_info *vptr)
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{
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/* Only for newer revisions */
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if (vptr->rev_id >= REV_ID_VT3216_A0) {
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u8 txqueue_timer = 0;
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u8 rxqueue_timer = 0;
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if (vptr->mii_status & (VELOCITY_SPEED_1000 |
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VELOCITY_SPEED_100)) {
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txqueue_timer = vptr->options.txqueue_timer;
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rxqueue_timer = vptr->options.rxqueue_timer;
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}
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writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
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writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
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}
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}
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/**
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* setup_adaptive_interrupts - Setup interrupt suppression
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*
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* @vptr velocity adapter
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*
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* The velocity is able to suppress interrupt during high interrupt load.
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* This function turns on that feature.
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*/
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static void setup_adaptive_interrupts(struct velocity_info *vptr)
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{
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struct mac_regs __iomem *regs = vptr->mac_regs;
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u16 tx_intsup = vptr->options.tx_intsup;
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u16 rx_intsup = vptr->options.rx_intsup;
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/* Setup default interrupt mask (will be changed below) */
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vptr->int_mask = INT_MASK_DEF;
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/* Set Tx Interrupt Suppression Threshold */
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writeb(CAMCR_PS0, ®s->CAMCR);
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if (tx_intsup != 0) {
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vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I |
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ISR_PTX2I | ISR_PTX3I);
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writew(tx_intsup, ®s->ISRCTL);
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} else
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writew(ISRCTL_TSUPDIS, ®s->ISRCTL);
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/* Set Rx Interrupt Suppression Threshold */
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writeb(CAMCR_PS1, ®s->CAMCR);
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if (rx_intsup != 0) {
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vptr->int_mask &= ~ISR_PRXI;
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writew(rx_intsup, ®s->ISRCTL);
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} else
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writew(ISRCTL_RSUPDIS, ®s->ISRCTL);
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/* Select page to interrupt hold timer */
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writeb(0, ®s->CAMCR);
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}
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/**
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* velocity_init_registers - initialise MAC registers
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@ -1332,7 +1392,7 @@ static void velocity_init_registers(struct velocity_info *vptr,
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*/
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enable_mii_autopoll(regs);
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vptr->int_mask = INT_MASK_DEF;
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setup_adaptive_interrupts(vptr);
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writel(vptr->rx.pool_dma, ®s->RDBaseLo);
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writew(vptr->options.numrx - 1, ®s->RDCSize);
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@ -1789,6 +1849,8 @@ static void velocity_error(struct velocity_info *vptr, int status)
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BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG);
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else
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BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG);
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setup_queue_timers(vptr);
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}
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/*
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* Get link status from PHYSR0
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@ -3199,6 +3261,100 @@ static void velocity_set_msglevel(struct net_device *dev, u32 value)
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msglevel = value;
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}
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static int get_pending_timer_val(int val)
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{
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int mult_bits = val >> 6;
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int mult = 1;
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switch (mult_bits)
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{
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case 1:
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mult = 4; break;
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case 2:
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mult = 16; break;
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case 3:
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mult = 64; break;
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case 0:
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default:
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break;
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}
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return (val & 0x3f) * mult;
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}
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static void set_pending_timer_val(int *val, u32 us)
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{
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u8 mult = 0;
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u8 shift = 0;
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if (us >= 0x3f) {
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mult = 1; /* mult with 4 */
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shift = 2;
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}
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if (us >= 0x3f * 4) {
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mult = 2; /* mult with 16 */
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shift = 4;
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}
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if (us >= 0x3f * 16) {
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mult = 3; /* mult with 64 */
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shift = 6;
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}
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*val = (mult << 6) | ((us >> shift) & 0x3f);
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}
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static int velocity_get_coalesce(struct net_device *dev,
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struct ethtool_coalesce *ecmd)
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{
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struct velocity_info *vptr = netdev_priv(dev);
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ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup;
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ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup;
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ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer);
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ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer);
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return 0;
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}
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static int velocity_set_coalesce(struct net_device *dev,
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struct ethtool_coalesce *ecmd)
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{
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struct velocity_info *vptr = netdev_priv(dev);
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int max_us = 0x3f * 64;
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/* 6 bits of */
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if (ecmd->tx_coalesce_usecs > max_us)
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return -EINVAL;
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if (ecmd->rx_coalesce_usecs > max_us)
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return -EINVAL;
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if (ecmd->tx_max_coalesced_frames > 0xff)
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return -EINVAL;
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if (ecmd->rx_max_coalesced_frames > 0xff)
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return -EINVAL;
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vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames;
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vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames;
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set_pending_timer_val(&vptr->options.rxqueue_timer,
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ecmd->rx_coalesce_usecs);
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set_pending_timer_val(&vptr->options.txqueue_timer,
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ecmd->tx_coalesce_usecs);
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/* Setup the interrupt suppression and queue timers */
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mac_disable_int(vptr->mac_regs);
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setup_adaptive_interrupts(vptr);
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setup_queue_timers(vptr);
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mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
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mac_clear_isr(vptr->mac_regs);
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mac_enable_int(vptr->mac_regs);
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return 0;
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}
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static const struct ethtool_ops velocity_ethtool_ops = {
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.get_settings = velocity_get_settings,
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.set_settings = velocity_set_settings,
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@ -3208,6 +3364,8 @@ static const struct ethtool_ops velocity_ethtool_ops = {
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.get_msglevel = velocity_get_msglevel,
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.set_msglevel = velocity_set_msglevel,
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.get_link = velocity_get_link,
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.get_coalesce = velocity_get_coalesce,
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.set_coalesce = velocity_set_coalesce,
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.begin = velocity_ethtool_up,
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.complete = velocity_ethtool_down
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};
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@ -1005,7 +1005,8 @@ struct mac_regs {
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volatile __le32 RDBaseLo; /* 0x38 */
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volatile __le16 RDIdx; /* 0x3C */
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volatile __le16 reserved_3E;
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volatile u8 TQETMR; /* 0x3E, VT3216 and above only */
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volatile u8 RQETMR; /* 0x3F, VT3216 and above only */
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volatile __le32 TDBaseLo[4]; /* 0x40 */
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@ -1491,6 +1492,10 @@ struct velocity_opt {
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int rx_bandwidth_hi;
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int rx_bandwidth_lo;
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int rx_bandwidth_en;
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int rxqueue_timer;
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int txqueue_timer;
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int tx_intsup;
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int rx_intsup;
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u32 flags;
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};
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