forked from luck/tmp_suning_uos_patched
ide: add ->set_irq method
Add ->set_irq method for setting nIEN bit of ATA Device Control register and use it instead of ide_set_irq(). While at it: * Use ->set_irq in init_irq() and do_reset1(). * Don't use HWIF() macro in ide_check_pm_state(). There should be no functional changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz
parent
1f6d8a0fd8
commit
6e6afb3b74
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@ -746,16 +746,17 @@ static void ide_check_pm_state(ide_drive_t *drive, struct request *rq)
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* the bus may be broken enough to walk on our toes at this
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* point.
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*/
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ide_hwif_t *hwif = drive->hwif;
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int rc;
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#ifdef DEBUG_PM
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printk("%s: Wakeup request inited, waiting for !BSY...\n", drive->name);
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#endif
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rc = ide_wait_not_busy(HWIF(drive), 35000);
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rc = ide_wait_not_busy(hwif, 35000);
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if (rc)
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printk(KERN_WARNING "%s: bus not ready on wakeup\n", drive->name);
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SELECT_DRIVE(drive);
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ide_set_irq(drive, 1);
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rc = ide_wait_not_busy(HWIF(drive), 100000);
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hwif->set_irq(hwif, 1);
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rc = ide_wait_not_busy(hwif, 100000);
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if (rc)
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printk(KERN_WARNING "%s: drive not ready on wakeup\n", drive->name);
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}
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@ -1041,7 +1042,7 @@ static void ide_do_request (ide_hwgroup_t *hwgroup, int masked_irq)
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* quirk_list may not like intr setups/cleanups
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*/
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if (drive->quirk_list != 1)
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ide_set_irq(drive, 0);
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hwif->set_irq(hwif, 0);
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}
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hwgroup->hwif = hwif;
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hwgroup->drive = drive;
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@ -1519,6 +1520,7 @@ EXPORT_SYMBOL(ide_do_drive_cmd);
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void ide_pktcmd_tf_load(ide_drive_t *drive, u32 tf_flags, u16 bcount, u8 dma)
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{
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ide_hwif_t *hwif = drive->hwif;
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ide_task_t task;
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memset(&task, 0, sizeof(task));
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@ -1529,9 +1531,9 @@ void ide_pktcmd_tf_load(ide_drive_t *drive, u32 tf_flags, u16 bcount, u8 dma)
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task.tf.lbah = (bcount >> 8) & 0xff;
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ide_tf_dump(drive->name, &task.tf);
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ide_set_irq(drive, 1);
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hwif->set_irq(hwif, 1);
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SELECT_MASK(drive, 0);
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drive->hwif->tf_load(drive, &task);
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hwif->tf_load(drive, &task);
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}
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EXPORT_SYMBOL_GPL(ide_pktcmd_tf_load);
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@ -135,6 +135,23 @@ static u8 ide_read_sff_dma_status(ide_hwif_t *hwif)
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return inb(hwif->dma_base + ATA_DMA_STATUS);
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}
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static void ide_set_irq(ide_hwif_t *hwif, int on)
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{
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u8 ctl = ATA_DEVCTL_OBS;
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if (on == 4) { /* hack for SRST */
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ctl |= 4;
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on &= ~4;
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}
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ctl |= on ? 0 : 2;
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
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else
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outb(ctl, hwif->io_ports.ctl_addr);
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}
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static void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
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{
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ide_hwif_t *hwif = drive->hwif;
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@ -360,6 +377,8 @@ void default_hwif_transport(ide_hwif_t *hwif)
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hwif->read_altstatus = ide_read_altstatus;
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hwif->read_sff_dma_status = ide_read_sff_dma_status;
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hwif->set_irq = ide_set_irq;
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hwif->tf_load = ide_tf_load;
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hwif->tf_read = ide_tf_read;
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@ -722,7 +741,7 @@ int ide_driveid_update(ide_drive_t *drive)
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*/
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SELECT_MASK(drive, 1);
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ide_set_irq(drive, 0);
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hwif->set_irq(hwif, 0);
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msleep(50);
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hwif->exec_command(hwif, WIN_IDENTIFY);
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timeout = jiffies + WAIT_WORSTCASE;
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@ -808,12 +827,12 @@ int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
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SELECT_DRIVE(drive);
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SELECT_MASK(drive, 0);
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udelay(1);
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ide_set_irq(drive, 0);
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hwif->set_irq(hwif, 0);
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hwif->OUTB(speed, io_ports->nsect_addr);
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hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr);
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hwif->exec_command(hwif, WIN_SETFEATURES);
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if (drive->quirk_list == 2)
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ide_set_irq(drive, 1);
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hwif->set_irq(hwif, 1);
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error = __ide_wait_stat(drive, drive->ready_stat,
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BUSY_STAT|DRQ_STAT|ERR_STAT,
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@ -1129,7 +1148,6 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
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ide_hwgroup_t *hwgroup;
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struct ide_io_ports *io_ports;
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const struct ide_port_ops *port_ops;
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u8 ctl;
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spin_lock_irqsave(&ide_lock, flags);
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hwif = HWIF(drive);
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@ -1174,16 +1192,15 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
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* immediate interrupt due to the edge transition it produces.
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* This single interrupt gives us a "fast poll" for drives that
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* recover from reset very quickly, saving us the first 50ms wait time.
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*
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* TODO: add ->softreset method and stop abusing ->set_irq
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*/
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/* set SRST and nIEN */
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hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS | 6, io_ports->ctl_addr);
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hwif->set_irq(hwif, 4);
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/* more than enough time */
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udelay(10);
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if (drive->quirk_list == 2)
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ctl = ATA_DEVCTL_OBS; /* clear SRST and nIEN */
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else
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ctl = ATA_DEVCTL_OBS | 2; /* clear SRST, leave nIEN */
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hwif->OUTBSYNC(hwif, ctl, io_ports->ctl_addr);
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/* clear SRST, leave nIEN (unless device is on the quirk list) */
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hwif->set_irq(hwif, drive->quirk_list == 2);
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/* more than enough time */
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udelay(10);
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hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
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@ -361,7 +361,7 @@ static int try_to_identify (ide_drive_t *drive, u8 cmd)
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autoprobe = 1;
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cookie = probe_irq_on();
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}
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ide_set_irq(drive, autoprobe);
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hwif->set_irq(hwif, autoprobe);
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}
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retval = actual_try_to_identify(drive, cmd);
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@ -369,7 +369,7 @@ static int try_to_identify (ide_drive_t *drive, u8 cmd)
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if (autoprobe) {
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int irq;
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ide_set_irq(drive, 0);
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hwif->set_irq(hwif, 0);
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/* clear drive IRQ */
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(void)hwif->read_status(hwif);
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udelay(5);
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@ -709,7 +709,7 @@ static int ide_port_wait_ready(ide_hwif_t *hwif)
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/* Ignore disks that we will not probe for later. */
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if (!drive->noprobe || drive->present) {
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SELECT_DRIVE(drive);
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ide_set_irq(drive, 1);
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hwif->set_irq(hwif, 1);
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mdelay(2);
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rc = ide_wait_not_busy(hwif, 35000);
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if (rc)
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@ -1066,8 +1066,7 @@ static int init_irq (ide_hwif_t *hwif)
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sa = IRQF_SHARED;
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if (io_ports->ctl_addr)
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/* clear nIEN */
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hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS, io_ports->ctl_addr);
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hwif->set_irq(hwif, 1);
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if (request_irq(hwif->irq,&ide_intr,sa,hwif->name,hwgroup))
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goto out_unlink;
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@ -80,7 +80,7 @@ ide_startstop_t do_rw_taskfile (ide_drive_t *drive, ide_task_t *task)
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if ((task->tf_flags & IDE_TFLAG_DMA_PIO_FALLBACK) == 0) {
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ide_tf_dump(drive->name, tf);
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ide_set_irq(drive, 1);
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hwif->set_irq(hwif, 1);
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SELECT_MASK(drive, 0);
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hwif->tf_load(drive, task);
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}
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@ -149,6 +149,23 @@ static u8 scc_read_sff_dma_status(ide_hwif_t *hwif)
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return (u8)in_be32((void *)(hwif->dma_base + 4));
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}
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static void scc_set_irq(ide_hwif_t *hwif, int on)
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{
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u8 ctl = ATA_DEVCTL_OBS;
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if (on == 4) { /* hack for SRST */
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ctl |= 4;
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on &= ~4;
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}
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ctl |= on ? 0 : 2;
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out_be32((void *)hwif->io_ports.ctl_addr, ctl);
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eieio();
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in_be32((void *)(hwif->dma_base + 0x01c));
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eieio();
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}
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static void scc_ide_insw(unsigned long port, void *addr, u32 count)
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{
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u16 *ptr = (u16 *)addr;
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@ -802,6 +819,8 @@ static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
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hwif->read_altstatus = scc_read_altstatus;
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hwif->read_sff_dma_status = scc_read_sff_dma_status;
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hwif->set_irq = scc_set_irq;
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hwif->tf_load = scc_tf_load;
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hwif->tf_read = scc_tf_read;
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@ -502,6 +502,22 @@ static void pmac_exec_command(ide_hwif_t *hwif, u8 cmd)
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+ IDE_TIMING_CONFIG));
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}
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static void pmac_set_irq(ide_hwif_t *hwif, int on)
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{
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u8 ctl = ATA_DEVCTL_OBS;
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if (on == 4) { /* hack for SRST */
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ctl |= 4;
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on &= ~4;
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}
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ctl |= on ? 0 : 2;
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writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
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(void)readl((void __iomem *)(hwif->io_ports.data_addr
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+ IDE_TIMING_CONFIG));
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}
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/*
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* Old tuning functions (called on hdparm -p), sets up drive PIO timings
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*/
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@ -1100,6 +1116,7 @@ static int __devinit pmac_ide_setup_device(pmac_ide_hwif_t *pmif, hw_regs_t *hw)
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return -ENOENT;
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hwif->exec_command = pmac_exec_command;
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hwif->set_irq = pmac_set_irq;
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/* Setup MMIO ops */
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default_hwif_mmiops(hwif);
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@ -494,6 +494,8 @@ typedef struct hwif_s {
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u8 (*read_altstatus)(struct hwif_s *);
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u8 (*read_sff_dma_status)(struct hwif_s *);
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void (*set_irq)(struct hwif_s *, int);
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void (*tf_load)(ide_drive_t *, struct ide_task_s *);
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void (*tf_read)(ide_drive_t *, struct ide_task_s *);
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@ -1356,14 +1358,6 @@ static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
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return &hwif->drives[(drive->dn ^ 1) & 1];
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}
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static inline void ide_set_irq(ide_drive_t *drive, int on)
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{
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ide_hwif_t *hwif = drive->hwif;
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hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS | (on ? 0 : 2),
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hwif->io_ports.ctl_addr);
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}
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static inline u8 ide_read_error(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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