forked from luck/tmp_suning_uos_patched
clocksource: convert W90x900 24-bit down counting clocksource
Convert the W90x900 24-bit down-counting clocksource to the generic mmio clocksource infrastructure Acked-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -575,6 +575,7 @@ config ARCH_W90X900
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select CPU_ARM926T
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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help
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Support for Nuvoton (Winbond logic dept.) ARM9 processor,
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@ -43,7 +43,6 @@
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#define PRESCALE 0x63 /* Divider = prescale + 1 */
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#define TDR_SHIFT 24
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#define TDR_MASK ((1 << TDR_SHIFT) - 1)
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static unsigned int timer0_load;
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@ -143,19 +142,6 @@ static void __init nuc900_clockevents_init(void)
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clockevents_register_device(&nuc900_clockevent_device);
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}
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static cycle_t nuc900_get_cycles(struct clocksource *cs)
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{
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return (~__raw_readl(REG_TDR1)) & TDR_MASK;
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}
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static struct clocksource clocksource_nuc900 = {
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.name = "nuc900-timer1",
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.rating = 200,
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.read = nuc900_get_cycles,
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.mask = CLOCKSOURCE_MASK(TDR_SHIFT),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static void __init nuc900_clocksource_init(void)
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{
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unsigned int val;
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@ -175,7 +161,8 @@ static void __init nuc900_clocksource_init(void)
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val |= (COUNTEN | PERIOD | PRESCALE);
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__raw_writel(val, REG_TCSR1);
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clocksource_register_hz(&clocksource_nuc900, rate);
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clocksource_mmio_init(REG_TDR1, "nuc900-timer1", rate, 200,
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TDR_SHIFT, clocksource_mmio_readl_down);
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}
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static void __init nuc900_timer_init(void)
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