forked from luck/tmp_suning_uos_patched
tg3: Remove excessive parenthesis
This patch removes some excessive parenthesizing. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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0da0606f49
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6ff6f81dd4
@ -553,7 +553,7 @@ static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
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{
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unsigned long flags;
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) &&
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 &&
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(off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC))
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return;
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@ -578,7 +578,7 @@ static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
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{
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unsigned long flags;
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) &&
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 &&
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(off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC)) {
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*val = 0;
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return;
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@ -2806,7 +2806,7 @@ static int tg3_power_down_prepare(struct tg3 *tp)
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CLOCK_CTRL_PWRDOWN_PLL133, 40);
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} else if (tg3_flag(tp, 5780_CLASS) ||
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tg3_flag(tp, CPMU_PRESENT) ||
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(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
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/* do nothing */
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} else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) {
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u32 newbits1, newbits2;
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@ -8646,7 +8646,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
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}
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if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) &&
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(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714)) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
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u32 tmp;
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tmp = tr32(SERDES_RX_CTRL);
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@ -11636,7 +11636,7 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp)
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tw32(NVRAM_CFG1, nvcfg1);
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}
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) ||
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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tg3_flag(tp, 5780_CLASS)) {
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switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {
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case FLASH_VENDOR_ATMEL_FLASH_BUFFERED:
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@ -12640,9 +12640,9 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
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tg3_read_mem(tp, NIC_SRAM_DATA_VER, &ver);
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ver >>= NIC_SRAM_DATA_VER_SHIFT;
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700) &&
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(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) &&
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(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5703) &&
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if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 &&
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701 &&
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5703 &&
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(ver > 0) && (ver < 0x100))
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tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2);
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@ -13498,7 +13498,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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}
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}
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)) {
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701) {
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static struct tg3_dev_id {
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u32 vendor;
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u32 device;
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@ -13598,7 +13598,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tg3_flag(tp, 5780_CLASS))
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tg3_flag_set(tp, 5750_PLUS);
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
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tg3_flag(tp, 5750_PLUS))
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tg3_flag_set(tp, 5705_PLUS);
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@ -13627,9 +13627,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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}
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/* Selectively allow TSO based on operating conditions */
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if ((tg3_flag(tp, HW_TSO_1) ||
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tg3_flag(tp, HW_TSO_2) ||
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tg3_flag(tp, HW_TSO_3)) ||
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if (tg3_flag(tp, HW_TSO_1) ||
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tg3_flag(tp, HW_TSO_2) ||
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tg3_flag(tp, HW_TSO_3) ||
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(tp->fw_needed && !tg3_flag(tp, ENABLE_ASF)))
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tg3_flag_set(tp, TSO_CAPABLE);
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else {
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@ -13891,7 +13891,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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* It is also used as eeprom write protect on LOMs.
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*/
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tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM;
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
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tg3_flag(tp, EEPROM_WRITE_PROT))
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tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
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GRC_LCLCTRL_GPIO_OUTPUT1);
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@ -13943,8 +13943,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tp->phy_flags |= TG3_PHYFLG_IS_FET;
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/* A few boards don't want Ethernet@WireSpeed phy feature */
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
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((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
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(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
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(tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) &&
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(tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) ||
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(tp->phy_flags & TG3_PHYFLG_IS_FET) ||
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@ -14064,7 +14064,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tg3_flag_set(tp, IS_5788);
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if (!tg3_flag(tp, IS_5788) &&
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(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700))
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700)
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tg3_flag_set(tp, TAGGED_STATUS);
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if (tg3_flag(tp, TAGGED_STATUS)) {
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tp->coalesce_mode |= (HOSTCC_MODE_CLRTICK_RXBD |
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@ -14215,7 +14215,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
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#endif
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mac_offset = 0x7c;
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) ||
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 ||
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tg3_flag(tp, 5780_CLASS)) {
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if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID)
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mac_offset = 0xcc;
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