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[ARM] mv78xx0: force eth2/eth3 to PHYless mode on pre-A0 silicon

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On pre-A0 revisions of the mv78xx0 SoC, the third and fourth
ethernet interface are not brought out to pins, but are internally
cross-connected, so if we run on pre-A0 silicon, we'll force eth2
and eth3 to PHYless mode.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
This commit is contained in:
Lennert Buytenhek 2009-02-20 02:31:58 +01:00 committed by Nicolas Pitre
parent cfdeb6376e
commit 712424fd95
1 changed files with 27 additions and 0 deletions
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27
arch/arm/mach-mv78xx0/common.c
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@ -15,6 +15,7 @@
#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
#include <linux/ata_platform.h>
#include <linux/ethtool.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/mv78xx0.h>
@ -430,9 +431,22 @@ static struct platform_device mv78xx0_ge10 = {
void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
{
u32 dev, rev;
eth_data->shared = &mv78xx0_ge10_shared;
mv78xx0_ge10.dev.platform_data = eth_data;
/*
* On the Z0, ge10 and ge11 are internally connected back
* to back, and not brought out.
*/
mv78xx0_pcie_id(&dev, &rev);
if (dev == MV78X00_Z0_DEV_ID) {
eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
eth_data->speed = SPEED_1000;
eth_data->duplex = DUPLEX_FULL;
}
platform_device_register(&mv78xx0_ge10_shared);
platform_device_register(&mv78xx0_ge10);
}
@ -484,9 +498,22 @@ static struct platform_device mv78xx0_ge11 = {
void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
{
u32 dev, rev;
eth_data->shared = &mv78xx0_ge11_shared;
mv78xx0_ge11.dev.platform_data = eth_data;
/*
* On the Z0, ge10 and ge11 are internally connected back
* to back, and not brought out.
*/
mv78xx0_pcie_id(&dev, &rev);
if (dev == MV78X00_Z0_DEV_ID) {
eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
eth_data->speed = SPEED_1000;
eth_data->duplex = DUPLEX_FULL;
}
platform_device_register(&mv78xx0_ge11_shared);
platform_device_register(&mv78xx0_ge11);
}