forked from luck/tmp_suning_uos_patched
ARM: kernel: update topology to use new MPIDR macros
This patch updates the topology initialization code to use the newly defined accessors to retrieve the MPIDR affinity levels. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org>
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@ -257,19 +257,14 @@ void store_cpu_topology(unsigned int cpuid)
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if (mpidr & MPIDR_MT_BITMASK) {
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/* core performance interdependency */
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cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
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& MPIDR_LEVEL0_MASK;
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cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
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& MPIDR_LEVEL1_MASK;
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cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT)
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& MPIDR_LEVEL2_MASK;
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cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
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} else {
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/* largely independent cores */
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cpuid_topo->thread_id = -1;
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cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
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& MPIDR_LEVEL0_MASK;
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cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
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& MPIDR_LEVEL1_MASK;
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cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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}
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} else {
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/*
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